EEPROMS using carbon nanotubes for cell storage

• US 7,528,437 B2
• Filed: 02/08/2005
• Issued: 05/05/2009
• Est. Priority Date: 02/11/2004
• Status: Expired due to Fees

• Current Assignee: Nantero Incorporated
• Original Assignee: Nantero Incorporated
• Inventors: Bertin, Claude L., Segal, Brent M., Rueckes, Thomas
• Primary Examiner(s): Phung; Anh
• Assistant Examiner(s): LULIS, MICHAEL P
• Application Number:
  US11/053,135
• Publication Number:
  US 20050174842A1
• Time in Patent Office: 1,547 Days
• Field of Search: 257/314, 257/315, 257/E29.3, 977/742, 977/943
• US Class Current: 257/315
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: G11C 13/025 using fullerenes, e.g. C60, or nanotubes, e.g. carbon or silicon nanotubes
• CPC Class Codes: G11C 16/0416 comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
• CPC Class Codes: G11C 2213/17 Memory cell being a nanowire transistor
• CPC Class Codes: G11C 2213/79 Array wherein the access device being a transistor
• CPC Class Codes: G11C 23/00 Digital stores characterised by movement of mechanical parts to effect storage, e.g. using balls; Storage elements therefor
• CPC Class Codes: H01L 29/0665 the shape of the body defining a nanostructure nanotechnology per se B82B
• CPC Class Codes: H01L 29/0673 oriented parallel to a substrate
• CPC Class Codes: H01L 29/42324 Gate electrodes for transistors with a floating gate
• CPC Class Codes: H10K 10/481 characterised by the gate conductors
• CPC Class Codes: H10K 85/221 Carbon nanotubes
• CPC Class Codes: H10K 85/615 Polycyclic condensed aromatic hydrocarbons, e.g. anthracene
• CPC Class Codes: Y10S 977/742 Carbon nanotubes, CNTs
• CPC Class Codes: Y10S 977/943 Information storage or retrieval using nanostructure

Abstract

EEPROMS Using Carbon Nanotubes for Cell Storage. An electrically erasable programmable read only memory (EEPROM) cell includes cell selection circuitry and a storage cell for storing the informational state of the cell. The storage cell is an electro-mechanical data retention cell in which the physical positional state of a storage cell element represents the informational state of the cell. The storage cell element is a carbon nanotube switching element. The storage is writable with supply voltages used by said cell selection circuitry. The storage is writable and readable via said selection circuitry with write times and read times being within an order of magnitude. The write times and read times are substantially the same. The storage has no charge storage or no charge trapping.

Claims

1. An electrically erasable programmable read only memory (EEPROM) cell, comprising:

a cell selection transistor comprising a gate, a source, a drain, and a channel between the source and the drain; and

a storage cell for storing the informational state of the BEPROM cell, wherein the storage cell includes a gate, a source, a drain, a channel between the source and the drain, and a nanotube switch capable of at least two states,

wherein one of the source and the drain of the cell selection transistor electrically contacts one of the source and the drain of the storage cell, and

wherein the state of the nanotube switch represents the informational state of the EEPROM cell,

wherein the storage cell is writable and readable via said selection transistor with write times and read times being within an order of magnitude of each other.

2. The EEPROM cell of claim 1 wherein the storage cell is an electro-mechanical data retention cell in which the at least two states of the nanotube switch comprise at least two physical positional states.

3. The EEPROM cell of claim 2 wherein the carbon nanotube switch includes an element comprising nanotube fabric.

4. The EEPROM cell of claim 3 wherein the nanotube fabric comprises single-walled carbon nanotubes.

5. The EEPROM cell of claim 3 wherein the nanotube fabric comprises multi-walled nanotubes.

6. The EEPROM cell of claim 1 wherein the storage cell is writable with supply voltages used by said cell selection transistor.

7. The EEPROM cell of claim 1 wherein the write times and read times are substantially the same.

8. The EEPROM cell of claim 1 wherein the storage cell has no charge storage or no charge trapping.

9. The EEPROM cell of claim 1 wherein the nanotube switch comprises a nanotube element switchable into contact with the gate in response to modulation of a capacitive network.

10. The EEPROM cell of claim 1 wherein the nanotube switch is not in series with the channel of the storage cell.

11. The EEPROM cell of claim 1 wherein gate of the storage cell is a floating gate.

12. A nonvolatile random-access memory (NVRAM) cell in electrical communication with a true bit line, a complement bit line, and a select line, the NVRAM cell comprising:

first and second select transistors, each select transistor comprising a gate, a source, a drain, and a channel between the source and the drain, each select transistor selectable by activation of the select line; and

first and second storage cells, each storage cell comprising a gate, a source, a drain, a channel between the source and the drain, and a nanotube switch capable of at least two states,

wherein the first storage cell is connected to the first select transistor and is connected to the true bit line and is capable of storing a true bit state in response to activation of the first select transistor,

wherein the second storage cell is connected to the second select transistor and is connected to the complementary bit line and is capable of storing a complementary bit state in response to activation of the second select transistor;

wherein each storage cell is writable and readable via the corresponding cell selection transistor with write times and read times being within an order of magnitude of each other.

13. The NVRAM cell of claim 12 wherein the gate of each select transistor is coupled to the select line.

14. The NVRAM cell of claim 12 wherein the at least two states of the nanotube switches comprise at least two positional states.

15. The NVRAM cell of claim 14 wherein nanotube switches each include an element comprising nanotube fabric.

16. The NVRAM cell of claim 15 wherein the nanotube fabric comprises single-walled carbon nanotubes.

17. The NVRAM cell of claim 15 wherein the nanotube fabric comprises multi-walled nanotubes.

18. The NVRAM cell of claim 12 wherein each storage cell is writable with supply voltages used by said cell selection transistors.

19. The NVRAM cell of claim 12 wherein the write times and read times are substantially the same.

20. The NVRAM cell of claim 12 wherein each storage cell has no charge storage or no charge trapping.

21. The NVRAM cell of claim 12 wherein the nanotube switch comprises an element switchable into contact with the gate in response to modulation of a capacitive network.

22. The NVRAM cell of claim 12 wherein the nanotube switch is not in series with the channel of the storage cell.

23. The NVRAM cell of claim 12 wherein gate of the storage cell is a floating gate.