TMR/GMR amplifier with input current compensation

• US 7,529,053 B1
• Filed: 01/11/2007
• Issued: 05/05/2009
• Est. Priority Date: 08/30/2004
• Status: Expired due to Fees

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: Marvell International Limited (Marvell Technology Group Limited)
• Inventors: Voo, Thart Fah
• Primary Examiner(s): Feild; Joseph H
• Assistant Examiner(s): NEGRON, DANIELL L
• Application Number:
  US11/652,202
• Time in Patent Office: 845 Days
• Field of Search: None
• US Class Current: 360/67
• CPC Class Codes: G11B 2005/0018 by current biasing control or regulation
• CPC Class Codes: G11B 5/02 Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
• CPC Class Codes: H03F 1/342 in field-effect transistor amplifiers
• CPC Class Codes: H03F 2200/144 the feedback circuit of the amplifier stage comprising a passive resistor and passive capacitor
• CPC Class Codes: H03F 2200/453 Controlling being realised by adding a replica circuit or by using one among multiple identical circuits as a replica circuit
• CPC Class Codes: H03F 2200/474 A current mirror being used as sensor
• CPC Class Codes: H03F 2203/45136 One differential amplifier in IC-block form being shown
• CPC Class Codes: H03F 2203/45528 the FBC comprising one or more passive resistors and being coupled between the LC and the IC
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit

Abstract

An amplifier system with feedback current cancellation comprises an amplifier, a feedback network, an operational amplifier (op-amp), and second, third, and fourth resistances. The amplifier includes an input, an output, and at least one stage. The feedback network includes a first resistance that communicates with the input and the output of the amplifier. The operational amplifier (op-amp) includes an inverting input that communicates with the input of the amplifier, a non-inverting input, and an output. The second resistance communicates with the input of the amplifier and with the output of the op-amp. The third resistance communicates with the output of the op-amp and with the non-inverting input of the op-amp. The fourth resistance communicates with the non-inverting input of the op-amp and with the output of the amplifier.

Claims

1. An amplifier system with feedback current cancellation comprising:

an amplifier with an input, an output, and at least one stage;

a feedback network that includes a first resistance having one end that communicates with the input of the amplifier and an opposite end that communicates with the output of the amplifier;

an operational amplifier (op-amp) having a non-inverting input, an inverting input, and an output, wherein the inverting input communicates with the input of the amplifier;

a second resistance that has one end that communicates with the input of the amplifier and an opposite end that communicates with the output of the op-amp;

a third resistance that has one end that communicates with the output of the op-amp and an opposite end that communicates with the non-inverting input of the op-amp; and

a fourth resistance that has one end that communicates with the non-inverting input of the op-amp and an opposite end that communicates with the output of the amplifier.

2. The amplifier system of claim 1 wherein the second resistance has a resistance value approximately equal to a resistance value of the first resistance, and the fourth resistance has a resistance value that is approximately equal to a resistance value of the third resistance.

3. A sensor system comprising the amplifier system of claim 1 and further comprising:

a current sensor; and

a variable resistance that communicates with, and is biased by, the current source, wherein the input of the amplifier communicates with one end of the variable resistance.

4. A hard disk drive system comprising the sensor system of claim 3.

5. The amplifier system of claim 1 wherein the amplifier is arranged in a differential mode.

6. The amplifier system of claim 1 wherein the amplifier is arranged in a single-ended mode.

7. The amplifier system of claim 1 further comprising a DC blocking capacitance that communicates with the input of the amplifier.