Capacitive ultrasonic transducers with isolation posts

• US 7,530,952 B2
• Filed: 04/01/2004
• Issued: 05/12/2009
• Est. Priority Date: 04/01/2004
• Status: Active Grant

• Current Assignee: Board of Trustees of the Leland Stanford Junior University (Stanford Management Co.)
• Original Assignee: Board of Trustees of the Leland Stanford Junior University (Stanford Management Co.)
• Inventors: Huang, Yongli, Khuri-Yakub, Butrus T.
• Primary Examiner(s): WINAKUR, ERIC FRANK
• Application Number:
  US10/817,381
• Publication Number:
  US 20050228285A1
• Time in Patent Office: 1,867 Days
• Field of Search: 600/437, 600/459, 367/163, 367/174, 367/181, 367/189, 310/324, 310/328
• US Class Current: 600/459
• CPC Class Codes: B06B 1/0292 Electrostatic transducers, e.g. electret-type

Abstract

A capacitive ultrasonic transducer is described which include one or more cells including a cavity defined by a membrane electrode supported spaced from a support electrode by insulating walls with a patterned isolation layer having isolation posts or areas located in said cavity to prevent the electrodes for coming into contact during operation of the transducer, and to minimize the accumulation of charge as compared to a non-patterned isolation layer for preventing contact of the electrodes during operation of the transducer.

Claims

1. A capacitive ultrasonic transducer comprising at least one cavity defined by a first support electrode, insulating support walls forming with the support electrode wells, and a membrane electrode having a membrane electrode surface area, the membrane electrode supported by the support walls and spaced from the support electrode, characterized in that, at least one isolation post or area of insulating material having a thickness is formed in said at least one cavity, the amount of the membrane electrode surface covered by or disposed adjacent to the at least one isolation post or area being smaller than the full membrane electrode surface area and selected to reduce accumulation of charge between the cost or area and the membrane electrode, and the thickness selected to prevent contact of the membrane electrode to the support electrode during operation of the transducer.

2. A capacitive ultrasonic transducer as in claim 1 in which the support electrode is a low resistance silicon support and the support walls are an oxide, and the membrane is silicon.

3. A capacitive ultrasonic transducer as in claims 1 or 2 in which the at least one isolation post or area is carried by the support electrode.

4. A capacitive ultrasonic transducer as in claims 1 or 2 in which the at least one isolation post or area is carried by the membrane.

5. A capacitive ultrasonic transducer as in claims 1 or 2 in which the at least one isolation post or area is located at a selected location with the size, shape, and height selected to prevent shorting between electrodes and minimize the number of trapped ions.

6. A capacitive ultrasonic transducer as in claim 5 in which the height, shape and location of the at least one isolation post or area is selected so that the membrane comes in contact with the at least one isolation post or area during post contact operation of the transducer.

7. A capacitive ultrasonic transducer as in claim 1 wherein said at least one isolation post or area comprises a plurality of isolation posts or areas at any selected location with height, size and shape which prevents shorting between the electrodes during operation of the transducer and minimizes accumulation of charges.

8. A capacitive ultrasonic transducer comprising:

at least one cavity defined by a support substrate forming a first electrode of said transducer, walls of insulating material on said support and a thin membrane supported by said walls and forming the second electrode of said transducer, said membrane forming said second electrode having a membrane surface area; and

at least one post or area of dielectric isolation material having a thickness formed in said at least one cavity, the amount of the membrane surface covered by or disposed adjacent to the at least one post or area being smaller than the full membrane surface area and selected to reduce accumulation of charge between the at least one post or area and the membrane, and the thickness selected for limiting the deflection of said membrane during operation to prevent contact of the membrane with the support substrate during operation of the transducer and to minimize accumulation of charge.

9. A capacitive transducer as in claim 8 in which the membrane material is selected from silicon, silicon nitride, sapphire or diamond.

10. A capacitive ultrasonic transducer as in claims 8 or 9 in which the at least one isolation post or area of dielectric isolation material is a dielectric isolation material.

11. A capacitive ultrasonic transducer as in claim 10 in which the walls of insulating material are a dielectric isolation material.

12. A capacitive ultrasonic transducer as in claims 8 or 9 in which the at least one isolation post or area is formed on the support substrate.

13. A capacitive ultrasonic transducer as in claims 8 or 9 in which the at least one isolation post or area is formed on the membrane.

14. A capacitive ultrasonic transducer as in claims 8 or 9 in which the location of the at least one isolation post or area is chosen to optimize the frequency response of the transducer.

15. A capacitive ultrasonic transducer as in claim 14 in which the size, shape and height of the at least one isolation post or area is further chosen to optimize the frequency response of the transducer.