Configurable circuits, IC's, and systems

• US 7,532,032 B2
• Filed: 08/28/2006
• Issued: 05/12/2009
• Est. Priority Date: 02/14/2004
• Status: Expired due to Fees

• Current Assignee: Tahoe Research Limited (f/k/a Learndale Limited) (Vector Capital Corporation)
• Original Assignee: Tabula Incorporated
• Inventors: Schmit, Herman, Hutchings, Brad L., Teig, Steven, Butts, Michael
• Primary Examiner(s): Chang, Daniel D
• Application Number:
  US11/467,918
• Publication Number:
  US 20070075737A1
• Time in Patent Office: 988 Days
• Field of Search: 326 37- 41
• US Class Current: 326/40
• CPC Class Codes: H03K 19/17736 Structural details of routing resources
• CPC Class Codes: H03K 19/17744 for input/output signals
• CPC Class Codes: H03K 19/17758 for speeding up configuration or reconfiguration

Abstract

Some embodiments of the invention provide configurable integrated circuit (IC) that has a first interface rate for exchanging signals with a circuit outside of the configurable IC. The configurable IC has an array of configurable circuits. The array includes several configurable logic and interconnect circuits. Each configurable logic circuit can configurably perform a set of functions. The configurable interconnect circuits can configurably couple the logic circuits. At least several of the configurable circuits can be reconfigured faster than the first rate.

Claims

1. An integrated circuit (IC) that has an interface rate for exchanging signals in at least one direction with a circuit outside of the IC, the IC comprising:

a plurality of reconfigurable circuits;

wherein at least one of the reconfigurable circuits is for reconfiguring faster than the interface rate;

wherein a reconfigurable circuit reconfigures when configuration data that specifies an operation of the reconfigurable circuit changes from a first configuration data set stored in the IC to a second configuration data set stored in the IC; and

a plurality of interface circuits for communicating with a set of circuits outside of the IC,

wherein the interface rate is faster than an operational rate of at least one interface circuit, but slower than an operational rate of another interface circuit.

2. The IC of claim 1, wherein said exchanging comprises sending and receiving.

3. The IC of claim 1, wherein said exchanging comprises one of sending and receiving.

4. The IC of claim 1 further comprising a signal generator for generating a configuration signal for selecting configuration data for the plurality of reconfigurable circuits.

5. The IC of claim 1, wherein during a plurality of reconfiguration periods at least a plurality of the reconfigurable circuits are reconfigured faster than the interface rate.

6. The IC of claim 1, wherein at least one of said plurality of interface circuits is for communicating with the circuit outside of the IC at said interface rate.

7. The IC of claim 1, wherein the plurality of reconfigurable circuits comprises a plurality of reconfigurable logic circuits and a plurality reconfigurable interconnect circuits.

8. The IC of claim 1 further comprising a plurality of non-configurable circuits, wherein each reconfigurable circuit performs at least one operation, and each non-configurable circuit performs only one operation and cannot be reconfigured to perform another operation.

9. The IC of claim 1, wherein said signals are at least one of input and output signals, wherein said signals are not for configuring the IC.

10. The IC of claim 1, wherein said interface rate is the rate that an interface circuit of the IC exchanges signals with circuits outside of the IC.

11. The IC of claim 1, wherein said interface rate is the rate that the IC communicates with other circuitry.

12. An integrated circuit (IC) that has an interface rate for exchanging signals in at least one direction with a circuit outside of the IC, the IC comprising:

a plurality of reconfigurable circuits;

wherein at least one of the reconfigurable circuits is for reconfiguring faster than the interface rate;

wherein a reconfigurable circuit reconfigures when configuration data that specifies an operation of the reconfigurable circuit changes from a first configuration data set stored in the IC to a second configuration data set stored in the IQ; and

a signal generator for generating a configuration signal for selecting configuration data for the plurality of reconfigurable circuits,

wherein said interface rate defines an interface cycle, wherein the signal generator is a sub-cycle signal generator that generates a sub-cycle signal that has more than one cycle during an interface cycle.

13. An electronics system comprising:

an integrated circuit (IC) that has a first interface rate for exchanging signals in at least one direction with a circuit outside of the IC, the IC comprising at least a first reconfigurable circuit,

wherein the first reconfigurable circuit is reconfigured at a second rate faster than said first interface rate,

wherein a reconfigurable circuit reconfigures when configuration data that specifies an operation of the reconfigurable circuit changes from a first configuration data set stored in the IC to a second configuration data set stored in the IC; and

a plurality of interface circuits for communicating with circuitry outside of the IC,

wherein the first interface rate is faster than an operational rate of at least one interface circuit, but slower than an operational rate of another interface circuit.

14. The electronics system of claim 13 further comprising a memory communicatively coupled to the IC for storing data.

15. The electronics system of claim 13, wherein at least one of the plurality of interface circuits is for communicating with the circuit outside of the IC at the first interface rate.

16. The electronics system of claim 13, wherein the IC further comprises a signal generator for generating a configuration signal that causes the plurality of reconfigurable circuits to reconfigure at a reconfiguration rate that is faster than the first interface rate.

17. The electronics system of claim 13, wherein the circuit outside of the IC is a memory.

18. The electronics system of claim 13, wherein said signals are at least one of input and output signals, wherein said signals are not for configuring the IC.

19. The electronics system of claim 13, wherein said first interface rate is the rate that an interface circuit of the IC exchanges signals with circuits outside of the IC.

20. The electronics system of claim 13, wherein said first interface rate is the rate that the IC communicates with other circuitry.