Apparatus and methods for multi-level sensing in a memory array

• US 7,532,529 B2
• Filed: 08/14/2006
• Issued: 05/12/2009
• Est. Priority Date: 03/29/2004
• Status: Expired due to Fees

• Current Assignee: Saifun Semiconductors Ltd. (Infineon Technologies AG)
• Original Assignee: Saifun Semiconductors Ltd. (Infineon Technologies AG)
• Inventors: Betser, Yoram, Maayan, Eduardo, Dadashev, Oleg
• Primary Examiner(s): Phung; Anh
• Assistant Examiner(s): Sofocleous; Alexander
• Application Number:
  US11/464,253
• Publication Number:
  US 20060285402A1
• Time in Patent Office: 1,002 Days
• Field of Search: 327/56, 327/68, 327/70, 327/76, 327/80, 365/210.15, 365/185.21, 365/189.07, 365/207, 365/210.1
• US Class Current: 365/207
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/32 Timing circuits
• CPC Class Codes: G11C 2211/5634 Reference cells

Abstract

A method for sensing a signal received from an array cell within a memory array, the method comprising the steps of generating an analog voltage Vddr proportional to a current of a selected array cell of the memory array, and comparing the analog voltage Vddr with a reference analog voltage Vcomp to generate an output digital signal. A method is also provided for sensing a memory cell by transforming a signal from a memory cell to a time delay, and sensing the memory cell by comparing the time delay to a time delay of a reference cell. Related apparatus is also disclosed.

Claims

1. A reference cell comparator comprising:

a first input terminal functionally associated with a reference cell;

a second input terminal functionally associated with a multi-comparator signal line; and

an output terminal adapted to provide a trigger signal when input signals at the first and second input terminal substantially meet a predefined criteria, wherein said trigger signal is adapted to trigger sampling of an output of a data cell comparator functionally associated with the multi comparator signal line; and

wherein said reference cell and the data cell have matched sensing paths.

2. The comparator according to claim 1, wherein the second input terminal is adapted to receive a voltage signal.

3. The comparator according to claim 2, wherein the first input terminal is adapted to receive a voltage signal.

4. The comparator according to claim 1, wherein the first input terminal is adapted to receive a current signal.

5. The comparator according to claim 4, wherein the comparator is adapted to convert a current signal to a voltage signal.

6. The comparator according to claim 2, wherein the comparator is adapted to produce a trigger signal when a voltage level of the signal at the first terminal reaches a voltage level of the signal at the second terminal.

7. The comparator according to claim 1 further comprising a sense amplifier.

8. The comparator according to claim 1 further comprising a current to voltage conversion circuit.

9. A data cell comparator comprising:

a first input terminal functionally associated with a data cell;

a second input terminal functionally associated with a multi-comparator signal line; and

an output terminal adapted for sampling when input signals at first and second input terminals of a reference cell comparator functionally associated with the multi-comparator signal line substantially meet a predefined criteria, wherein said reference cell and said data cell have matched sensing paths.

10. The comparator according to claim 9, further comprising a sense amplifier.

11. The comparator according to claim 9, wherein the second input terminal is adapted to receive a voltage signal.

12. The comparator according to claim 9, wherein the first input terminal is adapted to receive a voltage signal.

13. The comparator according to claim 9, further comprising a current to voltage conversion circuit.

14. The comparator according to claim 9, wherein the first input terminal is adapted to receive a current signal.

15. The comparator according to claim 14, wherein the comparator is adapted to convert a current signal to a voltage signal.

16. The comparator according to claim 11, wherein the output terminal provides a signal indicating whether a voltage level of the signal at the first input terminal reaches a voltage level of the signal at the second input terminal.

17. A data unit comprising:

a register adapted to receive an output signal of a data cell comparator associated with a multi-comparator signal line substantially when input signals at first and second input terminals of a reference cell comparator functionally associated with the multi-comparator signal line substantially meet a predefined criteria, wherein said reference cell and said data cell have matched sensing paths.

18. The data unit according to claim 17 adapted to receive a trigger signal from the reference comparator.

19. The data unit according to claim 18 adapted to receive the output signal of the data cell comparator upon receiving the trigger signal.

20. The data unit according to claim 19 adapted to receive the output signal of the data cell comparator upon receiving a signal derived from the trigger signal