Wireless communication apparatus and method, and computer program

• US 7,532,665 B2
• Filed: 05/31/2005
• Issued: 05/12/2009
• Est. Priority Date: 06/11/2004
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Akiyama, Keiji, Tanaka, Katsuyuki, Takada, Masayuki
• Primary Examiner(s): Payne; David C
• Assistant Examiner(s): Guarino; Rahel
• Application Number:
  US11/139,684
• Publication Number:
  US 20050276319A1
• Time in Patent Office: 1,442 Days
• Field of Search: 375/220, 375/221, 375/355, 375/357, 375/358, 455/86, 370/282, 370/508, 370/310.1, 370/469
• US Class Current: 375/220
• CPC Class Codes: H04B 1/40 Circuits

Abstract

A wireless communication apparatus for transmission/reception of a wireless communication signal, including first and second circuits that process a transmission/reception signal, an oscillator that generates a reception clock on a first circuit side, the reception clock being used for an operation reference, a first interface that supplies the reception clock from the first circuit to the second circuit, a second interface that supplies, to the first circuit, transmission data output from the second circuit synchronously with the reception clock supplied from the first circuit, and delay compensation that compensates for a delay between the reception clock and transmission data at the first circuit, the reception clock and transmission data being input via the second interface.

Claims

1. A wireless communication apparatus for transmission/reception of a wireless communication signal, comprising:

first and second circuits for processing a transmission/reception signal;

an oscillator for generating a reception clock on a first circuit side, the reception clock being used for an operation reference;

a first interface for supplying the reception clock from said first circuit to said second circuit;

a second interface for inputting, to said first circuit, transmission data output from said second circuit synchronously with the reception clock supplied from said first circuit; and

delay compensating means for compensating for a delay between the reception clock and transmission data at said first circuit, the reception clock and transmission data being input via said second interface,

wherein, in a data transmission mode a data transmission process is executed, and in a calibration mode a delay time of transmission data is computed, and in said calibration mode, said delay compensating means sends a calibration pulse having a duration over an anticipated maximum delay time from said first circuit to said second circuit via said first interface, and compensates for a delay time on the basis of a delay between a pulse looped-back from said second circuit to said first circuit via said second interface and the original calibration pulse, and

in accordance with a phase difference between the pulse looped-back from said second circuit to said first circuit via said second interface and the original calibration pulse, said delay compensating means compensates for a delay time less than one clock period and inserts a proper delay amount into transmission data to make the transmission data have the maximum delay time.

2. The wireless communication apparatus as claimed in claim 1, wherein said first circuit is a wireless circuit module for performing a transmission/reception process of a wireless communication signal, and said second circuit is a physical layer module for processing transmission data in a physical layer protocol.

3. The wireless communication apparatus as claimed in claim 1, wherein said delay compensating means inserts a proper delay amount into the transmission data and maintains a delay of the transmission data to be always constant.