Semiconductor device having a fuse and method of forming thereof

• US 7,535,078 B2
• Filed: 02/14/2002
• Issued: 05/19/2009
• Est. Priority Date: 02/14/2002
• Status: Expired due to Fees

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Kobayashi, Thomas S., Sheck, Stephen G., Pozder, Scott K.
• Primary Examiner(s): Menz; Douglas M
• Assistant Examiner(s): Fulk; Steven J.
• Application Number:
  US10/075,218
• Publication Number:
  US 20030151060A1
• Time in Patent Office: 2,651 Days
• Field of Search: 257/529, 257/207, 257/390, 257/777, 257/778, 257/110, 257/100, 257/779, 257/50, 257/209, 257/530, 257/E23.149, 287/530, 438/108, 438/131, 438/132, 438/215, 438/218, 438/333, 438/467, 438/601, 438/281
• US Class Current: 257/529
• CPC Class Codes: H01L 23/5256 comprising fuses, i.e. connections having their state changed from conductive to non-conductive
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

A fuse (43) is formed overlying a passivation layer (35) and under a packaging material (55, 70). In one embodiment, a fuse (43) is blown before the packaging material (55, 70) is formed. In some embodiments, the fuse (43) may be formed of metal (47), a metal nitride (42) or a combination thereof.

Claims

1. A semiconductor device, comprising:

a substrate having circuitry formed therein;

a passivation layer formed overlying at least a portion of the substrate;

a fuse, which may be selectively open-circuited, formed overlying the passivation layer; and

a packaging material formed in contact with an entire surface the fuse, wherein the packaging material is selected from the group consisting of a mold compound and an underfill.

2. A semiconductor device as in claim 1, wherein a recessed area is formed in the passivation layer and wherein at least a portion of the fuse is formed in the recessed area.

3. A semiconductor device as in claim 1, wherein the fuse comprises a metal.

4. A semiconductor device as in claim 3, wherein the fuse comprises aluminum.

5. A semiconductor device as in claim 1, wherein the fuse comprises a metal nitride.

6. A semiconductor device as in claim 1, wherein the fuse comprises a metal and a metal nitride.

7. A semiconductor device as in claim 1, wherein the fuse comprises a metal having a thickness less than approximately 1 micron.

8. A semiconductor device as in claim 1, wherein the fuse is electrically connected to only the circuitry, and is not electrically connected to anything external to the circuitry.

9. The semiconductor device as in claim 1, wherein the circuitry comprises a first circuit and a second circuit, the semiconductor device further comprising:

a first interconnect for electrically connecting the first circuit to a first portion of the fuse; and

a second interconnect for electrically connecting the second circuit to a second portion of the fuse,

wherein the first circuit and the second circuit are no longer electrically connected if the fuse is open-circuited.

10. The semiconductor device as in claim 1, wherein the fuse is in contact with the passivation layer.

11. A semiconductor device, comprising:

a substrate having a first circuit formed therein, a second circuit formed therein, and a fuse, wherein;

the first circuit has a first contact area,

the second circuit has a second contact area; and

the fuse, which may be selectively open-circuited, is formed overlying the passivation layer, the fuse having a third contact area which is electrically coupled to the first contact area of the first circuit, and the fuse having a fourth contact area which is electrically coupled to the second contact area of the second circuit, wherein the first contact area of the first circuit and the second contact area of the second circuit are no longer electrically connected if the fuse is open-circuited;

a first interconnect for electrically connecting the first contact area to a first portion of the fuse; and

a second interconnect for electrically connecting the second contact area to a second portion of the fuse,

a passivation layer formed overlying at least a portion of the substrate, wherein the fuse is formed overlying the passivation layer; and

a packaging material formed in contact with an entire length of the fuse, wherein the packaging material is selected from the group consisting of a mold compound and an underfill.

12. A semiconductor device as in claim 11, wherein a recessed area is formed in the passivation layer and wherein at least a portion of the fuse is formed in the recessed area.

13. A semiconductor device as in claim 11, wherein the fuse comprises a metal.

14. A semiconductor device as in claim 13, wherein the fuse comprises aluminum.

15. A semiconductor device as in claim 11, wherein the fuse comprises a metal nitride.

16. A semiconductor device as in claim 11, wherein the fuse comprises a metal and a metal nitride.

17. A semiconductor device as in claim 11, wherein the first contact area of the first circuit and the second contact area of the second circuit are electrically connected only by way of the fuse.

18. A method for forming a semiconductor device having a fuse, comprising:

providing a substrate;

forming a passivation layer overlying at least a portion of the substrate;

forming the fuse overlying the passivation layer;

forming circuitry within the substrate, and

forming a packaging material in contact with an entire surface the fuse, wherein the packaging material is selected from the group consisting of a mold compound and an underfill.

19. A method of claim 18, further comprising:

blowing the fuse before forming a packaging material.

20. A method of claim 18, wherein forming the circuitry comprises:

forming a first circuit and forming a second circuit;

forming a first interconnect for electrically connecting the first circuit to a first portion of the fuse; and

forming a second interconnect for electrically connecting the second circuit to a second portion of the fuse, wherein the first circuit and the second circuit are no longer electrically connected if the fuse is open-circuited.