Wafer bonding of thinned electronic materials and circuits to high performance substrates

• US 7,535,100 B2
• Filed: 05/20/2003
• Issued: 05/19/2009
• Est. Priority Date: 07/12/2002
• Status: Expired due to Term

• Current Assignee: the united states of america as represented by the secretary of the navy
• Original Assignee: the united states of america as represented by the secretary of the navy
• Inventors: Hobart, Karl D., Kub, Francis J.
• Primary Examiner(s): PHAM, THANHHA S
• Application Number:
  US10/457,692
• Publication Number:
  US 20040009649A1
• Time in Patent Office: 2,191 Days
• Field of Search: 257/57, 257/77, 257/194, 257/728, 257723-725, 257/275, 257/782, 257/625, 257/676, 257/E27.137, 257/E27.144, 257/E23.021, 257/E23.062, 117/94
• US Class Current: 257/728
• CPC Class Codes: B82Y 30/00 Nanotechnology for materials or surface science, e.g. nanocomposites
• CPC Class Codes: H01L 21/187 by direct bonding
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 21/6836 Wafer tapes, e.g. grinding or dicing support tapes adhesive tapes in general C09J7/20
• CPC Class Codes: H01L 2221/68327 used during dicing or grinding
• CPC Class Codes: H01L 2221/6834 used to protect an active side of a device or wafer
• CPC Class Codes: H01L 2221/68368 used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
• CPC Class Codes: H01L 2221/68381 Details of chemical or physical process used for separating the auxiliary support from a device or wafer
• CPC Class Codes: H01L 23/4827 Materials
• CPC Class Codes: H01L 24/96 the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01011 Sodium [Na]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01018 Argon [Ar]
• CPC Class Codes: H01L 2924/01032 Germanium [Ge]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01046 Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 Silver [Ag]
• CPC Class Codes: H01L 2924/01057 : Lanthanum [La]
• CPC Class Codes: H01L 2924/01061 : Promethium [Pm]
• CPC Class Codes: H01L 2924/01072 : Hafnium [Hf]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/10336 : Aluminium gallium arsenide [AlGaAs]
• CPC Class Codes: H01L 2924/12036 : PN diode
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13064 : High Electron Mobility Transistor [HEMT, HFET [heterostructure FET], MODFET]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/3011 : Impedance

Abstract

A method of bonding a wafer to a substrate comprising the steps of: providing a wafer having a front surface and a back surface; attaching the front surface of the wafer to a support; thinning the wafer from the back surface; bonding the back surface of the wafer to a substrate using a thin bonding technique; and removing the support from the front surface of the wafer. A circuit comprising: a substrate; and a wafer; wherein the wafer is at most about 50 microns thick; wherein the wafer has a front surface comprising features; and wherein the wafer has a back surface bonded to the substrate using a thin bonding technique.

Claims

1. A circuit comprising:

a substrate;

wherein the substrate is microwave insulating; and

a wafer;

wherein the wafer has a front surface comprising a microwave device and more than one independent circuits; and

wherein the wafer has a back surface directly contacted and bonded to the substrate by direct wafer bonding with atom-to-atom bonding with hydrogen or covalent bonds between atoms on the wafer and atoms on the substrate.

2. The circuit of claim 1, wherein the wafer is at most about 50 microns thick.

3. The circuit of claim 1, wherein the wafer is a silicon-on-insulator wafer.

4. The circuit of claim 1, wherein the substrate has a thermal conductivity higher than the thermal conductivity of the wafer.

5. The circuit of claim 1, wherein the substrate has a thermal conductivity of at least about 150 W/mK.

6. The circuit of claim 1, wherein the substrate has a resistivity higher than the resistivity of the wafer.

7. The circuit of claim 1, wherein the substrate has a resistivity of at least about 3000 ohm-cm.

8. The circuit of claim 1, wherein the substrate is optically transparent.

9. The circuit of claim 1, wherein the substrate is an Au, Ag, or Li doped silicon substrate.

10. The circuit of claim 1, wherein the substrate is selected from the group consisting of a composite single-crystal substrate, a composite polycrystalline layer on a single crystal substrate, non-single crystal substrate, and a single-crystal substrate.

11. The circuit of claim 1, wherein the wafer is at most about 20 μ

m thick.

12. The circuit of claim 1, wherein the wafer is at most about 500 nm thick.

13. The circuit of claim 1, wherein the substrate is semi-insulating.

14. The circuit of claim 1, wherein the substrate is a gold-doped silicon substrate.