Removable memory media with integral indicator light

• US 7,535,370 B2
• Filed: 09/18/2007
• Issued: 05/19/2009
• Est. Priority Date: 02/22/2002
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Lexar Media Incorporated (Micron Technology, Inc.)
• Inventors: Estakhri, Petro
• Primary Examiner(s): Swarthout; Brent
• Application Number:
  US11/901,719
• Publication Number:
  US 20080143542A1
• Time in Patent Office: 609 Days
• Field of Search: 340/635, 340/540, 340/815.45, 36518508- 33, 365/200, 711100-113, 711/165, 702/64, 702/182, 710/8, 710/20, 710/22, 710/302, 396/310, 396/321
• US Class Current: 340/635
• CPC Class Codes: G11C 16/04 using variable threshold transistors, e.g. FAMOS
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 29/44 Indication or identification of errors, e.g. for repair

Abstract

A flash memory module includes an integral indicator light. The module alternatively includes a plurality electrical contacts which electrically interface to a host digital device. The module includes a plurality of flash memory cells. The cells are controlled by an integral controller. The indicator light is controlled by the controller. The indicator light indicates whether the flash memory module is being accessed. Alternatively, the indicator light indicates that the flash memory module should be replaced. A housing for the module is preferably light transmissive material, and preferably a transparent plastic. A proximal end of the module includes the electrical contacts and is inserted into the host. The indicator light is preferably a surface mount LED and is positioned adjacent the distal end of the flash memory module to be seen through the transparent plastic. Alternatively, the controller generates an electronic signal which is coupled to the host.

Claims

1. A flash memory device comprising:

an array of flash memory cells;

first indicator; and

a controller coupled to the array of flash memory cells and adapted to activate the first indicator at a first cadence to indicate the memory device is in-use and activate the first indicator at a second cadence to indicate that a quantity of program-erase cycles has reached a first predetermined threshold and activate the first indicator at a third cadence to indicate that a quantity of spare memory blocks is less than a second predetermined threshold.

2. The memory device of claim 1 wherein the first indicator is a first visual indicator adapted to illuminate at a first frequency of light.

3. The memory device of claim 1 wherein the first indicator is a first audible indicator.

4. The memory device of claim 2 further comprising a second visual indicator coupled to the controller and adapted to illuminate at a second frequency of light.

5. The memory device of claim 4 wherein the controller is adapted to activate the first visual indicator to indicate the memory device is in use and activate the second visual indicator to indicate that the memory device is in need of replacement.

6. The memory device of claim 4 wherein the first frequency of light comprises red light and the second frequency of light comprises green light.

7. The memory device of claim 1, wherein the first indicator is a Light Emitting Diode (LED).

8. The memory device of claim 7, wherein the LED is a surface mount LED.

9. The memory device of claim 1 wherein the controller is adapted to activate the first indicator in predetermined patterns, the patterns comprising Morse Code.

10. A flash memory module, the module comprising:

a housing;

a printed circuit board adapted to allow installation in the housing;

an electrical interface comprising electrical contacts coupled to the printed circuit board;

a first indicator light;

a flash memory device coupled to the printed circuit board, the memory device comprising;

an array of flash memory cells; and

a controller coupled to the array of flash memory cells and configured to activate the first indicator light in a plurality of cadences, each cadence indicating a condition of the memory device wherein a first cadence indicates that the memory is in use and a second cadence indicates that a quantity of spare memory blocks is less than a predetermined threshold.

11. The memory module of claim 10 further comprising a discrete signal, wherein the discrete signal is coupled to the controller and the electrical interface, the discrete signal comprising an indication that the flash memory module is operatively using the array of flash memory cells.

12. The memory module of claim 10 wherein the housing comprises a transparent plastic material.

13. A method for indicating the status of a flash memory device comprising an array of flash memory cells and a controller adapted to activate a single LED indicator, the method comprising:

activating the single LED indicator in a plurality of cadences, each cadence indicating a status of the memory device wherein a first cadence indicates that the array of flash memory cells is in use and a second cadence indicates that a quantity of program-erase cycles is greater than a predetermined threshold.

14. The method of claim 13 wherein the indicator is an audible indicator.

15. The method of claim 13 wherein the indicator is a visual indicator.

16. An electronic system, the system comprising:

a host processor having a first electrical interface and adapted to generate memory module control signals; and

a flash memory module, the flash memory module comprising;

a housing;

a printed circuit board substantially enclosed by the housing;

a second electrical interface coupled to the printed circuit board and adapted to mate with the first electrical interface; and

a flash memory device, the flash memory device comprising;

an array of flash memory cells;

an indicator light; and

a memory device controller, wherein the memory device controller is coupled to the second electrical interface and the indicator light and is adapted to blink the indicator light at a first speed to indicate that the memory device is active and blink the indicator light at a second speed to indicate that the memory module has either exceeded a first threshold for program-erase cycles or currently has less than a second threshold of spare memory blocks.

17. The electronic system of claim 16 further comprising a discrete signal coupled to the second electrical interface and generated by the memory device controller wherein the discrete signal indicates that the flash memory module is operatively using the flash memory array.