Control system architecture for a hybrid powertrain
First Claim
1. Control apparatus for a powertrain system comprising an internal combustion engine and a pair of electrical machines each operably coupled to a two-mode compound-split electro-mechanical transmission, comprising:
- a first control device comprising a system controller and first and second motor control processors;
the system controller operable to communicate with the first and second motor control processors via a first high speed communications bus, a second high speed communications bus, and, first and second serial peripheral interface buses; and
,the first and second motor control processors operable to control flow of electrical power between the pair of electrical machines and an electrical energy storage device, based upon input from the system controller.
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Accused Products
Abstract
A control apparatus for a powertrain system comprising an engine and two electrical machines operably coupled to a two-mode compound-split electro-mechanical transmission is provided. It includes a system controller and two motor control processors. The system controller communicates with the motor control processors via two high speed communications buses and directly-linked serial peripheral interface buses. The motor control processors control flow of electrical power between the electrical machines and an electrical energy storage device. A second control device is operable to control the engine, preferably to control torque output. The internal combustion engine preferably has a crank position sensor which is signally connected to a dedicated input to the second control device and to a dedicated input to the system controller of the first control device.
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Citations
24 Claims
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1. Control apparatus for a powertrain system comprising an internal combustion engine and a pair of electrical machines each operably coupled to a two-mode compound-split electro-mechanical transmission, comprising:
a first control device comprising a system controller and first and second motor control processors; the system controller operable to communicate with the first and second motor control processors via a first high speed communications bus, a second high speed communications bus, and, first and second serial peripheral interface buses; and
,the first and second motor control processors operable to control flow of electrical power between the pair of electrical machines and an electrical energy storage device, based upon input from the system controller. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. Article of manufacture for a powertrain system comprising a pair of electrical machines each operable to convert electrical energy to motive torque transmitted to an electro-mechanical transmission, comprising:
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a control device comprising a system controller and first and second motor control processors; the system controller operable to communicate with the first and second motor control processors via first and second serial peripheral interface buses; and
,the first and second motor control processors operable to control flow of electrical energy between the pair of electrical machines and an electrical energy storage device based upon input from the system controller. - View Dependent Claims (17, 18, 19, 20)
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21. Method for controlling a powertrain system comprising a system controller and first and second motor control processors operable to control a pair of electrical machines, the first and second motor control processors operable to control flow of electrical power between the pair of electrical machines and an electrical energy storage device, the method comprising:
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communicating between the system controller and each of the first and second motor control processors using a first high speed communications bus, communicating between the system controller and each of the first and second motor control processors using a second high speed communications bus, and, communicating between the system controller and the first and second motor control processors using first and second serial peripheral interface buses. - View Dependent Claims (22, 23, 24)
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Specification