High voltage integrated circuit driver with a high voltage PMOS bootstrap diode emulator

• US 7,538,583 B2
• Filed: 09/08/2006
• Issued: 05/26/2009
• Est. Priority Date: 07/21/2004
• Status: Expired due to Term

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Fairchild Semiconductor Corporation (ON Semiconductor Corporation)
• Inventors: Bryson, Stephen W.
• Primary Examiner(s): Barnie; Rexford
• Assistant Examiner(s): WHITE, DYLAN C
• Application Number:
  US11/517,629
• Publication Number:
  US 20070008010A1
• Time in Patent Office: 991 Days
• Field of Search: None
• US Class Current: 326/88
• CPC Class Codes: H03F 2200/31 the switching power stage comprising circuitry for emulating the behaviour of a bootstrap diode
• CPC Class Codes: H03F 2200/351 Pulse width modulation being used in an amplifying circuit
• CPC Class Codes: H03F 3/2171 with field-effect devices H03F3/2173 - H03F3/2178 take precedence
• CPC Class Codes: H03K 17/063 in field-effect transistor switches
• CPC Class Codes: H03K 17/6871 the output circuit comprising more than one controlled field-effect transistor
• CPC Class Codes: H03K 19/01735 by bootstrapping, i.e. by positive feed-back

Abstract

A high voltage circuit driver includes high and low side driver cells to drive a high and a low side power MOSFET, a bootstrap circuit to energize the high side driver cell, a high voltage PMOS transistor (HVPMOS) between a voltage source and the bootstrap circuit, wherein the HVPMOS is embedded in an N-isolation layer and is integrated with the driver cells. A bootstrap control circuit, for controlling the HVPMOS, includes a high voltage level shift stage, which can also be embedded in an N-isolation layer. The circuit driver is operated by switching the high side drive signal from high to low, the low side drive signal from low to high with a first delay, and a bootstrap control signal from high to low with an additional second delay. Also, the bootstrap capacitor is first charged by switching on the HVPMOS, and then it energizes the high side driver cell.

Claims

1. A driver circuit for driving a first transistor and a second transistor coupled together in a half-bridge arrangement at a switching node in a power converter system, the driver circuit comprising:

a first driver cell operable to drive the first transistor;

a second driver cell operable to drive the second transistor;

control circuitry coupled to the first and second driver cells, the control circuitry operable to cause the first and second driver cells to turn on and off the first and second transistors;

a bootstrap circuit coupled between the switching node and the first driver cell, the bootstrap circuit operable to provide a high voltage for the first driver cell; and

a high voltage PMOS transistor coupled between a first voltage source and the bootstrap circuit, wherein the high voltage PMOS transistor is integrated with the first and second driver cells, wherein the high voltage PMOS transistor is embedded in an N-isolation layer, wherein a source and a body of the high voltage PMOS transistor are electrically coupled, the high voltage PMOS transistor operable to be turned on so that the first voltage source charges the bootstrap circuit up to a voltage level of the first voltage source.

2. The driver circuit of claim 1 wherein the first transistor is a high side transistor and the second transistor is a low side transistor.

3. The driver circuit of claim 1 wherein the first driver cell is a high side driver cell and the second driver cell is a low side driver cell.

4. The driver circuit of claim 1 wherein the high voltage PMOS transistor acts as a diode emulator when it is turned off.

5. The driver circuit of claim 1 wherein the first driver cell, the second driver cell, the high voltage PMOS transistor, and the control circuitry are formed on a single integrated circuit device.

6. The driver circuit of claim 1 wherein the high voltage PMOS transistor operates at a floating voltage.

7. The driver circuit of claim 1 wherein the bootstrap circuit comprises a bootstrap capacitor.

8. A method for a driver circuit for driving a first transistor and a second transistor coupled together in a half-bridge arrangement at a switching node in a power converter system, the method comprising:

providing a first driver cell for driving the first transistor and a second driver cell for driving the second transistor;

providing a bootstrap circuit coupled between the switching node and the first driver cell, the bootstrap circuit operable to provide a high voltage for the first driver cell;

providing a high voltage PMOS transistor coupled between a first voltage source and the bootstrap circuit, wherein the high voltage PMOS transistor is integrated with the first and second driver cells, wherein the high voltage PMOS transistor is embedded in an N-isolation layer, wherein a source and a body of the high voltage PMOS transistor are electrically coupled; and

turning on the high voltage PMOS transistor so that the first voltage source charges the bootstrap circuit up to a voltage level of the first voltage source.

9. The method of claim 8 comprising turning off the high voltage PMOS transistor, wherein the high voltage PMOS transistor acts as a diode emulator when it is turned off

10. The method of claim 8 wherein the first driver cell, the second driver cell, and the high voltage PMOS transistor are formed on a single integrated circuit device.

11. A power converter system comprising:

a first transistor and a second transistor coupled together in a half-bridge arrangement at a switching node;

an inductor coupled at the switching node and through which a current flows to provide power at an output terminal;

a first driver cell operable to drive the first transistor;

a second driver cell operable to drive the second transistor;

control circuitry coupled to the first and second driver cells, the control circuitry operable to cause the first and second driver cells to turn on and off the first and second transistors;

a bootstrap circuit coupled between the switching node and the first driver cell, the bootstrap circuit operable to provide a high voltage for the first driver cell; and

a high voltage PMOS transistor coupled between a first voltage source and the bootstrap circuit, wherein the high voltage PMOS transistor is integrated with the first and second driver cells, wherein the high voltage PMOS transistor is embedded in an N-isolation layer, wherein a source and a body of the high voltage PMOS transistor are electrically coupled, the high voltage PMOS transistor operable to be turned on so that the first voltage source charges the bootstrap circuit up to a voltage level of the first voltage source.

12. The system of claim 11 wherein the first transistor is a high side transistor and the second transistor is a low side transistor.

13. The system of claim 11 wherein the first driver cell is a high side driver cell and the second driver cell is a low side driver cell.

14. The system of claim 11 wherein the high voltage PMOS transistor acts as a diode emulator when it is turned off.

15. The system of claim 11 wherein the first driver cell, the second driver cell, the high voltage PMOS transistor, and the control circuitry are formed on a single integrated circuit device.

16. The system of claim 11 wherein the high voltage PMOS transistor operates at a floating voltage.

17. The system of claim 11 wherein the bootstrap circuit comprises a bootstrap capacitor.