Method of programming flash memory device

• US 7,539,061 B2
• Filed: 11/07/2006
• Issued: 05/26/2009
• Est. Priority Date: 05/10/2006
• Status: Expired due to Fees

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: Lee, Min Kyu
• Primary Examiner(s): Nguyen; Tuan T.
• Application Number:
  US11/557,343
• Publication Number:
  US 20070263452A1
• Time in Patent Office: 931 Days
• Field of Search: 365/185.22, 365/185.17, 365/185.18
• US Class Current: 365/185.22
• CPC Class Codes: G11C 16/344 Arrangements for verifying correct erasure or for detecting overerased cells
• CPC Class Codes: G11C 16/3445 Circuits or methods to verify correct erasure of nonvolatile memory cells
• CPC Class Codes: G11C 16/3454 Arrangements for verifying correct programming or for detecting overprogrammed cells
• CPC Class Codes: G11C 16/3459 Circuits or methods to verify correct programming of nonvolatile memory cells

Abstract

At the time of a program of a NAND flash memory device, a re-program is performed on a cell connected to the last word line after program and program verification are completed. Thus, threshold voltage distributions of the cell connected to the last word line can be controlled to have a narrow width in the same manner as that of other cells. It is therefore possible to secure the read margin of a chip and to improve the yield. Accordingly, the durability and reliability of devices can be improved by threshold voltage distributions controlled to have a narrow width as described above.

Claims

1. A method of programming a flash memory device, comprising:

performing program and program verification on a selected memory cell; and

if the programmed cell is a cell connected to a last word line, performing a re-program.

2. The method of claim 1, wherein the program is performed by applying a program voltage to a word line connected to the selected cell and a pass voltage to a word line connected to an unselected cell.

3. The method of claim 1, wherein the program is performed by applying a ground voltage to a bit line connected to the selected cell and a power supply voltage to a bit line connected to an unselected cell.

4. The method of claim 1, wherein the program verification is performed by applying a verify voltage to a word line connected to the selected cell and a power supply voltage to a word line not connected to the selected cell.

5. The method of claim 4, wherein the program verification is performed by applying a voltage lower than the power supply voltage to a bit line connected to the selected cell and a ground voltage to a bit line connected to the unselected cell.

6. The method of claim 4, wherein the verify voltage is lower than the power supply voltage.

7. The method of claim 6, wherein the verify voltage is in the range of 0 to 1 V.

8. The method of claim 1, wherein the re-program is performed by applying a re-program voltage through the last word line and a power supply voltage through word lines other than the last word line.

9. The method of claim 8, wherein the re-program voltage is the same as or higher than a voltage at the time of the program verification.

10. The method of claim 8, wherein the re-program voltage is in the range of 1 to 1.5 V.

11. The method of claim 8, wherein the re-program is performed by applying a voltage to a bit line connected to the selected cell and a ground voltage to a bit line not connected to the selected cell.

12. The method of claim 11, wherein the voltage applied to the bit line connected to the selected cell is higher than the power supply voltage.

13. The method of claim 11, wherein the voltage applied to the bit line connected to the selected cell is 5 V.

14. The method of claim 1, wherein the re-program is performed for 150 μ

s or less.

15. A method of programming a flash memory device, comprising:

performing a program by applying a program voltage through a word line of a selected cell;

verifying a program status of the cell on which the program has been performed;

repeatedly performing the program while increasing the program voltage of a cell that has not been programmed as a result of the verification; and

if the programmed cell is connected to a last word line as a result of the verification, performing a re-program by applying a re-program voltage through the last word line and a voltage through a bit line.