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Interleaved memory program and verify method, device and system

  • US 7,539,062 B2
  • Filed: 12/20/2006
  • Issued: 05/26/2009
  • Est. Priority Date: 12/20/2006
  • Status: Expired due to Fees
First Claim
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1. A memory device, comprising:

  • a memory array including a first memory bank and a second memory bank of memory cells;

    a controller configured to program a first and second data into the memory array by concurrently programming the first data into one of the first and second memory banks and verifying the second data in the other one of the first and second memory banks, wherein the first and second data are interleaved;

    an I/O buffer configured to receive the first and second data for programming into the respective first and second memory banks; and

    a shared data cache configured to cache the first data from the I/O buffer until the first memory bank is readied to program the first data therein and further configured to subsequently cache the second data from the I/O buffer until the second memory bank is readied to program the second data therein.

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