Low power loss current digital-to-analog converter used in an implantable pulse generator

• US 7,539,538 B2
• Filed: 05/26/2005
• Issued: 05/26/2009
• Est. Priority Date: 05/28/2004
• Status: Active Grant

• Current Assignee: Boston Scientific Neuromodulation Corporation (Boston Scientific Corporation)
• Original Assignee: Boston Scientific Scimed (Boston Scientific Corporation)
• Inventors: Nimmagadda, Kiran, He, Yuping, Parramon, Jordi
• Primary Examiner(s): Layno; Carl H
• Assistant Examiner(s): LEE, YUN H
• Application Number:
  US11/138,632
• Publication Number:
  US 20050267546A1
• Time in Patent Office: 1,461 Days
• Field of Search: None
• US Class Current: 607/2
• CPC Class Codes: A61N 1/025 Digital circuitry features of electrotherapy devices, e.g. memory, clocks, processors
• CPC Class Codes: A61N 1/36071 Pain
• CPC Class Codes: A61N 1/36125 Details of circuitry or electric components
• CPC Class Codes: A61N 1/378 Electrical supply

Abstract

In one embodiment, the present invention provides an implantable stimulation device that includes output current sources and/or sinks configured to provide an output current for a load (i.e., tissue). The output path of the output current source or sink comprises a transistor which operates in a linear mode instead of a saturation mode. Because operation in a linear mode results in smaller drain-to-source voltage drops, power consumption in the output current source or sink (and hence in the implantable stimulator) is reduced, reducing battery or other power source requirements. Operation in the linear mode is facilitated in useful embodiments by a load in an input path (into which a reference current is sent) and a load in the output path (which bears the output current). The loads can be active transistors or passive resistors. A feedback circuit (e.g., an operational amplifier) receives voltages that build up across these loads, and sends a control signal to the gate of the transistor to ensure its linear operation.

Claims

1. An implantable stimulator device, comprising:

a first electrode implantable adjacent to tissue to be stimulated; and

a first stage in a first output current source or sink coupled to the first electrode, wherein the first stage comprises a first transistor for passing an output current along a first output path to the first electrode, wherein the drain-to-source voltage drop across the first transistor is less than a drain-to-source voltage drop of the first transistor when operating in a saturation mode,

wherein the output current is set by a reference current input to the first stage, and

wherein the output current equals the reference current.

2. The device of claim 1, further comprising:

a second electrode implantable adjacent to the tissue to be stimulated; and

a second stage in a second output current sink or source comprising the other of the source or sink of the first output current source or sink, the second stage coupled to the second electrode, wherein the second output current sink or source comprises a second transistor for receiving the output current along a second output path from the second electrode, wherein the drain-to-source voltage drop across the second transistor is less than a drain-to-source voltage drop of the second transistor when operating in a saturation mode.

3. The device of claim 1, wherein the first stage further comprises an amplifier for driving a gate of the first transistor.

4. The device of claim 3, wherein the inputs to the amplifier comprise a reference voltage and a voltage fed back from the first output path.

5. The device of claim 1, wherein a gate of the first transistor is influenced by a voltage fed back from the first output path.

6. The device of claim 1, wherein the magnitude of the output current compared to the reference current is set by digital bits sent to the first output current source or sink.

7. At least one output current source or sink for an implantable stimulator device, comprising:

a first input path for receiving a reference current;

a first output path for providing an output current to a first electrode of the implantable stimulator device, wherein the first electrode is implantable adjacent to tissue to be stimulated, and wherein a magnitude of the output current is dictated by a magnitude of the reference current; and

a first feedback circuit for comparing a first voltage on the first input path and a second voltage on the first output path, wherein the first feedback circuit controls a first transistor in the first output path such that the first transistor operates in a linear mode and not in a saturation mode.

8. The device of claim 7, further comprising another output current source or sink to complement the first output current source or sink, comprising:

a second input path for receiving a reference current;

a second output path for receiving the output current to a second electrode of the implantable stimulator device, wherein the second electrode is implantable adjacent to the tissue to be stimulated, and wherein a magnitude of the output current is dictated by a magnitude of the reference current;

a second feedback circuit for comparing a first voltage on the second input path and a second voltage on the second output path, wherein the second feedback circuit controls a second transistor in the second output path such that the second transistor operates in a linear mode and not in a saturation mode.

9. The device of claim 7, wherein the output current equals the reference current.

10. The device of claim 7, wherein the output current is N times higher than the reference current.

11. The device of claim 10, wherein N is provided by first and second loads whose impedances vary by the ratio N.

12. The device of claim 7, wherein the feedback circuit comprises an amplifier which outputs a control signal to a gate of the transistor.

13. The device of claim 7, wherein the first voltage is generated by passing the reference current through a first load, and wherein the second voltage is generated by passing the output current through a second load.

14. The device of claim 7, wherein the magnitude of the output current compared to the magnitude of the reference current is set by digital bits sent to the first output current source or sink.

15. At least one output current source or sink for an implantable stimulator device, comprising:

a first input path comprising a first load coupled to a power supply for receiving a reference current;

a first output path comprising a second load coupled to the power supply and a transistor, wherein the first output path comprises an output current coupled to a first electrode of the implantable stimulator device, wherein the first electrode is implantable adjacent to tissue to be stimulated; and

a first feedback circuit for comparing a first voltage on the first input path and a second voltage on the first output path, wherein the first feedback circuit controls the transistor such that the transistor operates in a linear mode and not in a saturation mode.

16. The device of claim 15, further comprising another output current source or sink to complement the first output current source or sink, comprising:

a second input path comprising a first load coupled to a power supply for receiving a reference current;

a second output path comprising a second load coupled to the power supply and a transistor, wherein the second output path comprises an output current coupled to a second electrode of the implantable stimulator device, wherein the second electrode is implantable adjacent to the tissue to be stimulated; and

a second feedback circuit for comparing a first voltage on the second input path and a second voltage on the second output path, wherein the second feedback circuit controls the transistor such that the transistor operates in a linear mode and not in a saturation mode.

17. The device of claim 15, wherein the output current equals the reference current.

18. The device of claim 15, wherein the output current is N times higher than the reference current.

19. The device of claim 18, wherein N is provided by the first and second loads whose impedances vary by the ratio N.

20. The device of claim 15, wherein the first and second loads are active transistors with a common bias voltage.

21. The device of claim 15, wherein the first and second loads are passive resistors.

22. The device of claim 15, wherein the feedback circuit comprises an amplifier which outputs a control signal to a gate of the transistor.

23. The device of claim 15, wherein the magnitude of the output current compared to the magnitude of the reference current is set by digital bits sent to the first output current source or sink.