Multifunction receiver-on-chip for electronic warfare applications
First Claim
1. A flexible multi-function broadband receiver system for use in electronic warfare on vehicles having weight, size and power consumption limitations, comprisinga receiver-on-a-chip having components monolithically formed on a substrate to provide a single integrated circuit chip for performing broadband signal detection using high speed analog-to-digital converters, at least one down-conversion circuit, a digital automatic gain control circuit, a digital signal processor for defining receiver function and a serializer all located on the single chip, whereby modularization is avoided and wherein size and power consumption are minimized, the transistors in a circuit thereto include silicon germanium transistors having switching speeds exceeding 100 GHz, thus to provide for said high speed analog-to-digital converters and reducing the number of IF down-conversion stages.
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Accused Products
Abstract
What is provided is a receiver-on-a-chip comprising a monolithic integrated circuit that reduces the receiver to a cigarette-pack-sized assembly mountable directly at an antenna element, with a much-increased operational bandwidth and instantaneous bandwidth, increased dynamic range and with a two-order-of-magnitude decrease in size and weight. Moreover, because of the elimination of all of the I/O drivers and attendant circuitry, power consumption is reduced by two-thirds, whereas the mean time before failure is increased to 10,000 hours due to the robustness of the monolithic integrated circuit and use of fiber optics.
36 Citations
18 Claims
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1. A flexible multi-function broadband receiver system for use in electronic warfare on vehicles having weight, size and power consumption limitations, comprising
a receiver-on-a-chip having components monolithically formed on a substrate to provide a single integrated circuit chip for performing broadband signal detection using high speed analog-to-digital converters, at least one down-conversion circuit, a digital automatic gain control circuit, a digital signal processor for defining receiver function and a serializer all located on the single chip, whereby modularization is avoided and wherein size and power consumption are minimized, the transistors in a circuit thereto include silicon germanium transistors having switching speeds exceeding 100 GHz, thus to provide for said high speed analog-to-digital converters and reducing the number of IF down-conversion stages.
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10. An electronic warfare receiver system light and small enough to be located on an unmanned aerial vehicle, and having a power consumption minimized to maximize endurance, comprising:
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an array of antenna elements on said unmanned aerial vehicle; a lightweight monolithic receiver-on-a-chip receiver located at each antenna element; fiber optic cables coupled at one end to the output of respective receivers; and
,a processor coupled to the other ends of said fiber optic cables for processing the individual outputs of said receivers-on-a-chip; and
wherein there are no I/O drivers between a circuits on said receiver-on-a-chip, whereby the power consumption of said receiver-on-a-chip receiver is made less than 10 watts. - View Dependent Claims (11, 12)
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- 13. A broadband receiver-on-a-chip receiver manufactured in a monolithic process using silicon-germanium transistor technology so as to produce transistor switching speeds in excess of 100 GHz to effectuate a 0.03 GHz to 18 GHz operational bandwidth.
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15. A flexible multi-function broadband receiver system for use in electronic warfare on vehicles having weight, size and power consumption limitations, comprising:
A receiver-on-a-chip having components monolithically formed on a substrate to provide a single integrated circuit chip for performing broadband signal detection using high speed analog-to-digital converters, at least one down-conversion circuit, a digital automatic gain control circuit, a digital signal processor for defining receiver function and a serializer all located on the single chip, whereby modularization is avoided and wherein size and power consumption are minimized, wherein the transistors in a circuit thereto include silicon germanium transistors having switching speeds exceeding 100 GHz, thus to provide for said high speed analog-to-digital converters and reducing the number of iF down-conversion stages; and
further including an array of antenna elements, a receiver-on-a-chip located and coupled to a respective antenna.- View Dependent Claims (16, 17, 18)
Specification