Integrated circuit comparator or amplifier

• US 7,545,183 B2
• Filed: 05/23/2007
• Issued: 06/09/2009
• Est. Priority Date: 08/30/2000
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Forbes, Leonard
• Primary Examiner(s): Wells; Kenneth B.
• Application Number:
  US11/752,796
• Publication Number:
  US 20070252621A1
• Time in Patent Office: 748 Days
• Field of Search: 327/108, 327/491
• US Class Current: 327/108
• CPC Class Codes: H03F 2200/513 the amplifier being made for low supply voltages
• CPC Class Codes: H03F 2200/78 A comparator being used in a controlling circuit of an amplifier
• CPC Class Codes: H03F 2203/45664 the LC comprising one or more cascaded inverter stages as output stage at one output of the dif amp circuit
• CPC Class Codes: H03F 2203/45666 the LC comprising two anti-phase controlled inverter circuits as output stages, e.g. fully differential
• CPC Class Codes: H03F 3/45183 Long tailed pairs H03F3/4521, H03F3/45237 take precedence
• CPC Class Codes: H03K 5/2472 using field effect transistors H03K5/2436 takes precedence
• CPC Class Codes: H03K 5/2481 with at least one differential stage

Abstract

An integrated circuit comparator comprises a differential amplifier, a source follower circuit coupled to a gate terminal of a first transistor in the differential amplifier, and an output circuit. One or more source follower circuits may be utilized in connection with the differential amplifier, and one or more source follower circuits may be utilized in connection with the output circuit.

Claims

1. A method, comprising:

providing a first input signal to a gate terminal of a first transistor in a first source follower circuit, applying a selected voltage to a gate terminal of a second transistor coupled in series with the first transistor, and providing the first input signal to a gate terminal of a first transistor in a differential amplifier, the first source follower circuit being coupled to a gate terminal of a second transistor in the differential amplifier;

providing a second input signal to a second source follower circuit coupled to the differential amplifier and having first and second transistors coupled in series, the second input signal being provided to a gate terminal of the first transistor and the selected voltage being applied to a gate terminal of the second transistor, the second input signal being provided to a gate terminal of a third transistor in the differential amplifier; and

providing a first amplified signal from the differential amplifier to a first inverter circuit coupled to the differential amplifier, the first amplified signal being formed based on the first input signal.

2. The method of claim 1, comprising providing a second amplified signal from the differential amplifier to a second inverter circuit coupled to the differential amplifier, the second amplified signal being formed based on the second input signal.

3. The method of claim 2, comprising generating, based upon the first and second amplified signals, a first output signal from the first inverter circuit and a second output signal from the second inverter circuit.

4. A method, comprising:

providing a first input signal to a first source follower circuit coupled to a differential amplifier, the first source follower having first and second transistors coupled in series, the first input signal being provided to a gate terminal of the first transistor and a selected voltage being applied to a gate terminal of the second transistor in the first source follower circuit, the first input signal also being provided to a gate terminal of a first transistor in the differential amplifier, the first source follower circuit coupled to a gate terminal of a second transistor in the differential amplifier;

providing a second input signal to a second source follower circuit coupled to the differential amplifier, the second source follower having first and second transistors coupled in series, the second input signal being provided to a gate terminal of the first transistor in the second source follower circuit and the selected voltage being applied to a gate terminal of the second transistor in the second source follower circuit, the second input signal also being provided to a gate terminal of a second transistor in the differential amplifier;

generating, based upon the first and second input signals, a first output signal from a first inverter circuit coupled to the differential amplifier.

5. The method of claim 4, comprising providing a signal from the first source follower circuit to a gate terminal of a third transistor in the differential amplifier, the provided signal being formed based upon the first input signal, and wherein the third transistor in the differential amplifier is coupled in series with the first transistor in the differential amplifier.

6. The method of claim 4, comprising providing a signal from the second source follower circuit to a gate terminal of a fourth transistor in the differential amplifier, the provided signal being formed based upon the second input signal, and wherein the fourth transistor in the differential amplifier is coupled in series with the second transistor in the differential amplifier.

7. The method of claim 4, wherein providing the first input signal comprises providing a reference voltage and wherein providing the second input signal comprises providing a voltage signal to be compared to the reference voltage.

8. The method of claim 7, wherein the first output signal comprises a first output signal indicative of a relative value of the voltage indicated by the first input signal and the voltage indicated by the second input signal.

9. The method of claim 8, comprising generating, based upon the first and second input signals, a second output signal from a second inverter circuit coupled to the differential amplifier.

10. The method of claim 9, wherein the second output signal comprises a second output signal indicative of a relative value of the voltage indicated by the first input signal and the voltage indicated by the second input signal.