Amplifier with current mirror bias adjust

• US 7,545,216 B2
• Filed: 12/10/2007
• Issued: 06/09/2009
• Est. Priority Date: 12/12/2006
• Status: Active Grant

• Current Assignee: James Pearce Hamley
• Original Assignee: James Pearce Hamley
• Inventors: Hamley, James Pearce
• Primary Examiner(s): NGUYEN, PATRICIA T
• Application Number:
  US12/001,053
• Publication Number:
  US 20080136522A1
• Time in Patent Office: 547 Days
• Field of Search: 330/261, 330/257, 330/267
• US Class Current: 330/261
• CPC Class Codes: H03F 2203/45244 the differential amplifier contains one or more explicit bias circuits, e.g. to bias the tail current sources, to bias the load transistors
• CPC Class Codes: H03F 2203/45304 the common gate stage of a BIFET cascode dif amp being implemented fully by FETs
• CPC Class Codes: H03F 2203/45476 the CSC comprising a mirror circuit
• CPC Class Codes: H03F 2203/45626 the LC comprising biasing means controlled by the input signal
• CPC Class Codes: H03F 2203/45641 the LC being controlled, e.g. by a signal derived from a non specified place in the dif amp circuit
• CPC Class Codes: H03F 2203/45681 the LC comprising offset compensating means
• CPC Class Codes: H03F 3/45286 Non-folded cascode stages
• CPC Class Codes: H03F 3/4578 in differential amplifiers with BiFET transistors as the active amplifying circuit

Abstract

An amplifier includes a differential amplifier stage, a voltage amplification stage and a power output stage. The bias level of the output stage is proportional to current through the voltage amplification stage. The voltage amplification stage includes a current mirror whereby controlled current through a first leg of the current mirror controls current through the remaining, second leg, which, in turn, determines the bias level of the power output stage. Control circuitry senses a parameter of the amplifier, such as DC bias or input signal level to generate a control signal which is applied to the first leg of the current mirror to thereby control bias level of the power output stage.

Claims

1. An amplifier including:

a differential amplifier stage,

a voltage amplification stage, and

a power output stage,

wherein;

a) the bias level of the output stage is proportional to current through the voltage amplification stage, and

b) the voltage amplification stage includes a current mirror whereby controlled current through a first leg of the current mirror controls current through the remaining, second leg, which, in turn, determines the bias level of the power output stage,

the amplifier further including control circuitry for sensing a parameter of the amplifier to generate a control signal which is applied to the first leg of the current mirror to thereby control bias level of the power output stage.

2. The amplifier of claim 1 wherein the control circuitry senses DC bias of the power output stage to generate a control signal which is applied to the first leg of the current mirror to thereby control bias level of the power output stage.

3. The amplifier of claim 1 wherein the control circuitry senses input signal level to generate a control signal which is applied to the first leg of the current mirror to thereby control bias level of the power output stage.