Phase shifter and current mode mixer

• US 7,545,855 B2
• Filed: 09/12/2005
• Issued: 06/09/2009
• Est. Priority Date: 09/08/2005
• Status: Expired due to Fees

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Behzad, Arya Reza, Afsahi, Ali
• Primary Examiner(s): Torres; Juan A
• Application Number:
  US11/224,609
• Publication Number:
  US 20070058747A1
• Time in Patent Office: 1,366 Days
• Field of Search: 375/219, 455/73, 710/1
• US Class Current: 375/219
• CPC Class Codes: H03D 2200/0025 Gain control circuits
• CPC Class Codes: H03D 2200/0084 Lowering the supply voltage and saving power
• CPC Class Codes: H03D 7/1441 using field-effect transistors H03D7/145 takes precedence
• CPC Class Codes: H03D 7/1458 Double balanced arrangements, i.e. where both input signals are differential
• CPC Class Codes: H04L 27/2647 Arrangements specific to the receiver only equalisation H04L27/01

Abstract

An integrated circuit radio transceiver comprises an integrated phase shift mixer for generating a phase and frequency shifted output signal to at least a portion of one of a transmitter or receiver front end. The integrated phase shift mixer includes a phase shift block that is operable to produce a phase shifted current signal at an output of the phase shift block and a mixer that is operable to produce the phase and frequency shifted output signal based upon the phase shifted current signal. One aspect of the present invention is that the phase shift block produces an output as a current signal and the mixer block is operably disposed and formed to receive the current signal produced by the phase shift block. Thus, the mixer includes a folded cascode mixer that provides a substantially low input impedance.

Claims

1. An integrated circuit radio transceiver, comprising:

a baseband processor operable to process ingoing digital communication signals and to produce outgoing digital communication signals;

a transmitter front end operable to process and transmit outgoing RF signals based upon the outgoing digital communication signals;

a receiver front end operable to receive ingoing RF signals and to process the ingoing RF signals to produce the ingoing digital communication signals to the baseband processor; and

an integrated phase shift mixer for generating a phase and frequency shifted output signal to at least a portion of one of the transmitter and receiver front ends, the integrated phase shift mixer further including;

a phase shift block operable to produce a phase shifted current signal at an output of the phase shift block; and

a mixing block operable to produce the phase and frequency shifted output current signal based upon the phase shifted current signal.

2. The integrated circuit radio transceiver of claim 1 wherein the phase shift block is operably coupled to a high impedance load at the output of the phase shift block.

3. The integrated circuit radio transceiver of claim 2 wherein the high impedance load comprises at least one inductive element.

4. The integrated circuit radio transceiver of claim 2 wherein the mixing block comprises a folded cascode mixer that further includes a low impedance cascode input operably coupled to the output of the phase shift block to receive the phase shifted current signal.

5. The integrated circuit radio transceiver of claim 4 wherein the impedance of the load is substantially higher than the impedance of the low impedance cascode input to prompt the phase shifted current signal to flow to the low impedance cascode input instead of flowing through the high impedance load.

6. The integrated circuit radio transceiver of claim 5 wherein the low impedance cascode input comprises a source terminal of a p-channel MOSFET.

7. The integrated circuit radio transceiver of claim 3 wherein the output of the phase shift block is coupled directly to a plurality of p-channel MOSFETs of the mixing block and further wherein an input impedance of the plurality of p-channel MOSFETs is substantially lower than an impedance of the load coupled to the output of the phase shift block.

8. An integrated circuit radio receiver, comprising:

a baseband processor operable to process ingoing digital communication signals and to produce outgoing digital communication signals;

a receiver front end operable to receive ingoing RF signals to produce the ingoing digital communication signals to the baseband processor; and

an integrated phase shift mixer for generating a phase and frequency shifted output signal to at least a portion of the receiver front end, the integrated phase shift mixer further including;

a phase shift block operable to produce a phase shifted current signal at an output of the phase shift block; and

a mixer block operable to produce the phase and frequency shifted output signal based upon the phase shifted current signal.

9. The integrated circuit radio receiver of claim 8 wherein the phase shift block is operably coupled to a high impedance load at the output of the phase shift block.

10. The integrated circuit radio receiver of claim 9 wherein the high impedance load comprises at least one inductive element.

11. The integrated circuit radio receiver of claim 9 wherein the mixer comprises a folded cascode mixer that further includes a low impedance cascode input operably coupled to the output of the phase shift block to receive the phase shifted current signal.

12. The integrated circuit radio receiver of claim 11 wherein an impedance of the high impedance load is substantially higher than an impedance of the low impedance cascade input to prompt the phase shifted current signal to flow to the low impedance cascode input instead of flowing through the high impedance load.

13. The integrated circuit radio receiver of claim 12 wherein the low impedance cascode input comprises a source terminal of a p-channel MOSFET.

14. The integrated circuit radio receiver of claim 9 wherein the output of the phase shift block is coupled directly to a plurality of p-channel MOSFETs of the mixing block and further wherein an input impedance of the plurality of p-channel MOSFETs is substantially lower than an impedance of the high impedance load coupled to the output of the phase shift block.

15. A method for phase and frequency shifting an ingoing RF communication signal, comprising:

receiving non-phase-aligned multi-path signal components of an ingoing communication signal;

phase shifting non-phase-aligned multi-path signal components to produce phase-aligned signal current components in the form of phase shifted current signals;

summing the phase shifted current signals to produce an ingoing current signal;

producing the ingoing current signal to a mixer; and

mixing the ingoing current signal with a local oscillation to produce a phase and frequency shifted ingoing signal.

16. The method of claim 15 further including amplifying the phase and frequency shifted ingoing signal and converting the amplified phase and frequency shifted ingoing signal to a digital ingoing signal.

17. The method of claim 16 wherein the mixing step further includes, in a folded cascode mixer, providing a low input impedance to prompt an output current to flow into the folded cascode mixer.

18. The method of claim 17 further including providing, in the folded cascode mixer, the received current to a mixing block and mixing the received current with a received oscillation to produce the phase and frequency shifted ingoing signal.

19. The method of claim 15 further including receiving non-phase-aligned multi-path signal components of an ingoing communication signal from a plurality of antennas.