Aligner evaluation system, aligner evaluation method, a computer program product, and a method for manufacturing a semiconductor device

• US 7,546,178 B2
• Filed: 08/03/2007
• Issued: 06/09/2009
• Est. Priority Date: 08/09/2002
• Status: Expired due to Term

• Current Assignee: Kioxia Corporation
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Kouno, Takuya, Nojima, Shigeki, Higashiki, Tatsuhiko
• Primary Examiner(s): Kasenge; Charles R
• Application Number:
  US11/882,620
• Publication Number:
  US 20070288113A1
• Time in Patent Office: 676 Days
• Field of Search: 700/109, 700/110, 700/120, 700/121, 700/124, 700/108, 702/81, 702/82, 702/84, 702/182, 702/183, 702/85, 702/184, 703/13, 703/14, 716/19, 716/21, 356/400, 356/401, 257/E21.53
• US Class Current: 700/121
• CPC Class Codes: G03F 7/705 Modelling or simulating from physical phenomena up to complete wafer processes or whole workflow in wafer productions
• CPC Class Codes: G03F 7/70525 Controlling normal operating mode, e.g. matching different apparatus, remote control or prediction of failure
• CPC Class Codes: G03F 7/70541 Tagging, i.e. hardware or software tagging of features or components, e.g. using tagging scripts or tagging identifier codes for identification of chips, shots or wafers
• CPC Class Codes: G03F 7/70591 Testing optical components
• CPC Class Codes: G03F 7/70991 Connection with other apparatus, e.g. multiple exposure stations, particular arrangement of exposure apparatus and pre-exposure and/or post-exposure apparatus; Shared apparatus, e.g. having shared radiation source, shared mask or workpiece stage, shared base-plate; Utilities, e.g. cable, pipe or wireless arrangements for data, power, fluids or vacuum

Abstract

An aligner evaluation system includes (a) an error calculation module configured to calculate error information on mutual optical system errors among a plurality of aligners; (b) a simulation module configured to simulate device patterns to be delineated by each of the aligners based on the error information; and (c) a evaluation module configured to evaluate whether each of the aligners has appropriate performances for implementing an organization of a product development machine group based on the simulated device pattern.

Claims

1. An evaluation system comprising hardware resources of:

an error calculation module configured to calculate error information on mutual optical system errors among plurality of aligners;

a simulation module configured to simulate device patterns to be delineated by each of the aligners based on the error information;

an evaluation module configured to evaluate whether each of the aligners has appropriate performances, which are determined by design specifications required by a product, for electing a group of appropriate aligners based on the simulated device patterns;

a virtual dangerous pattern extraction module configured to extract a pattern, which is defined by standard values required by design guidelines of the product, as a virtual dangerous pattern for each of the elected aligners among the simulated device patterns; and

a confirmation module configured to compare a shape of the virtual dangerous pattern with a shape of an actual dangerous pattern actually delineated by exposing the virtual dangerous pattern on an exposed object, for each of the elected aligners, so as to determine whether each of the elected aligners can be used for manufacturing the product.

2. The evaluation system of claim 1, further comprising a hardware resource of an adjustment value calculation module configured to calculate an adjustment value of a projection lens for each of the elected aligners based on the error information.

3. The evaluation system of claim 1, further comprising a hardware resource of a correction module configured to perform an optical proximity correction based on the shape of the virtual dangerous pattern.

4. The evaluation system of claim 1, further comprising hardware resources of:

a virtualization module configured to generate a plurality of virtual device patterns differing shape from the simulated device patterns; and

an alternative pattern extraction module configured to extract alternative pattern differing in shape from the virtual dangerous pattern but having an identical function with the virtual dangerous pattern among the virtual device patterns.

5. The evaluation system of claim 2, wherein the error information pertains to errors attributable to differences of aberration of projection lenses of the plurality of aligners, and errors attributable to differences of illumination optical systems.

6. The evaluation system of claim 5, wherein the errors attributable to the differences of aberration of the projection lenses is converted into Zernike coefficients.

7. The evaluation system of claim 5, wherein the errors attributable to the difference of the illumination optical systems are at least one of uneven illuminance, axial misalignment, and variation of coherence factors of the illumination optical systems.

8. The evaluation system of claim 1, wherein the evaluation module evaluates whether each of the simulated device patterns satisfies a design specification.

9. An evaluation method, comprising:

calculating error information on mutual optical system errors from among a plurality of aligners;

simulating device patterns to be delineated by each of the aligners based on the error information;

evaluating whether each of the aligners has appropriate performances, which are determined by design specifications required by a product, for electing a group of appropriate aligners based on the simulated device patterns;

extracting a pattern, which is defined by standard values required by design guidelines of the product, as a virtual dangerous pattern for each of the elected aligners among the simulated device patterns;

exposing and delineating the virtual dangerous pattern on an exposed object, and obtaining an actual dangerous pattern for each of the elected aligners;

measuring a shape of the actual dangerous pattern; and

comparing a shape of the virtual dangerous pattern with the shape of the actual dangerous pattern for each of the elected aligners, so as to determine whether each of the elected aligners can be used for manufacturing the product.

10. The evaluation method of claim 9, further comprising calculating an adjustment value of a projection lens for each of the elected aligners based on the error information.

11. The evaluation method of claim 9, further comprising performing an optical proximity correction for each of the aligners based on the virtual dangerous pattern.

12. The evaluation method of claim 9, further comprising:

simulating plural virtual device patterns differing in shape from the simulated device patterns; and

extracting alternative patterns differing in shape from the virtual dangerous patterns but having an identical function with the virtual dangerous patterns among the virtual device patterns.

13. The evaluation method of claim 10, wherein the error information pertains to errors attributable to differences of aberration of the projection lenses of the plurality of aligners, and the errors attributable to differences of illumination optical systems.

14. The evaluation method of claim 13, wherein the errors attributable to the differences of aberration of the projection lens is converted into Zernike coefficients.

15. The evaluation method of claim 13, wherein the errors attributable to the difference of the illumination optical systems are at least one of variation in uneven illuminance, axial misalignment, and coherence factors of the illumination optical systems.

16. The evaluation method of claim 9, wherein the evaluating evaluates whether each of the simulated device patterns satisfies design specification.

17. A computer program product within a computer-readable recording medium for executing an application on an aligner evaluation system, the computer program product comprising:

instructions within the computer-readable recording medium configured to calculate error information on mutual optical system errors of a plurality of aligners;

instructions within the computer-readable recording medium configured to simulate device patterns to be delineated by each of the aligners based on the error information;

instructions within the computer-readable recording medium configured to evaluate whether each of the aligners has appropriate performances, which are determined by design specifications required by a product, for electing a group of appropriate aligners based on the simulated device patterns;

instructions within the computer-readable recording medium configured to extract a pattern, which is defined by standard values required by guidelines of the product, as a virtual dangerous pattern for each of the elected aligners among the simulated device patterns; and

instructions within the computer-readable recording medium configured to compare a shape of the virtual dangerous pattern with a shape of an actual dangerous pattern actually delineated by exposing the virtual dangerous pattern on an exposed object, for each of the elected aligners, so as to determine whether each of the elected aligners can be used for manufacturing the product.

18. A method for manufacturing a semiconductor device comprising:

determining a layout of a device pattern;

preparing a set of masks produced based on the determined layout;

calculating error information on mutual optical system errors of a plurality of aligners;

simulating device patterns to be delineated by each of the aligners based on the error information;

evaluating whether each of the aligners has appropriate performances, which are determined by design specifications required by a product, for electing a group of appropriate aligners based on the simulated device pattern;

extracting a pattern, which is defined by standard values required by guidelines of the product, as a virtual dangerous pattern for each of the elected aligners among the simulated device patterns;

exposing and delineating the virtual dangerous pattern on an exposed object, and obtaining an actual dangerous pattern for each of the elected aligners;

measuring a shape of the actual dangerous pattern;

comparing a shape of the virtual dangerous pattern with the shape of the actual dangerous pattern so as to use the elected aligners, which delineates the shape of the actual dangerous pattern for each of the elected aligners, so as to determine whether each of the elected aligners can be used for manufacturing the product;

coating a photoresist film on a semiconductor wafer; and

exposing the photoresist film with one of the masks employing one the aligners, which can be used for manufacturing the product.