Method of manufacturing optical interference color display

• US 7,547,565 B2
• Filed: 05/20/2005
• Issued: 06/16/2009
• Est. Priority Date: 02/04/2005
• Status: Expired due to Fees

• Current Assignee: Snaptrack Incorporated (Qualcomm, Inc.)
• Original Assignee: Qualcomm MEMS Technologies Incorporated (Qualcomm, Inc.)
• Inventors: Lin, Wen-Jian
• Primary Examiner(s): Mulpuri; Savitri
• Application Number:
  US11/133,641
• Publication Number:
  US 20060177950A1
• Time in Patent Office: 1,488 Days
• Field of Search: 438/21, 438/29, 438/30, 438/706, 438/738, 430/315, 430/321
• US Class Current: 438/29
• CPC Class Codes: G02B 5/285 comprising deposited thin solid films G02B5/281 - G02B5/289 take precedence; multilayered film filters for fibre optic multiplexing G02B6/29361
• CPC Class Codes: H01L 27/14625 Optical elements or arrangements associated with the device

Abstract

The method of manufacturing an optical interference color display is described. A first electrode structure is formed over a substrate first. At least one first area, second area and third area are defined on the first electrode structure. A first sacrificial layer is formed over the first electrode structure of the first area, the second area and the third area. Moreover, a second sacrificial layer is formed over the first sacrificial layer inside the second area and the third area. In addition, a third sacrificial layer is formed over the second sacrificial layer inside the third area. The etching rates of all sacrificial layers are different. Then, a patterned support layer is formed over the first electrode structure. Next, a second electrode layer is formed and the sacrificial layers are removed to form air gaps. Therefore, the air gaps are effectively controlled by using the material having different etching rates.

Claims

1. A method of fabricating an optical interference color display, comprising:

providing a substrate, and forming a first electrode structure over the substrate;

defining a first area, a second area, and a third area on the first electrode structure;

forming a first sacrificial layer over the first electrode structure inside the first area, the second area and the third area;

forming a second sacrificial layer over the first sacrificial layer inside the second area and the third area;

forming a third sacrificial layer over the second sacrificial layer inside the third area, wherein the first sacrificial layer, the second sacrificial layer and the third sacrificial layer have different etching rates, wherein the etching rate of the second sacrificial layer is higher than the etching rate of the first sacrificial layer, and wherein the etching rate of the third sacrificial layer is higher than the etching rate of the second sacrificial layer;

forming a patterned support layer over the first electrode structure;

forming a second electrode layer over the first sacrificial layer inside the first area, the second sacrificial layer inside the second area, the third sacrificial layer inside the third area and a portion of the patterned support layer; and

removing the first sacrificial layer, the second sacrificial layer and the third sacrificial layer to form a plurality of air gaps between the first electrode structure and the second electrode layer wherein the plurality of air gaps provides a plurality of colors.

2. The method of fabricating an optical interference color display of claim 1, wherein the substrate comprises a glass substrate or a plastic substrate.

3. The method of fabricating an optical interference color display of claim 1, wherein the steps of forming the first electrode structure comprise:

forming a plurality of first electrodes over the substrate;

forming an absorption layer over the first electrodes; and

forming an optical layer over the absorption layer.

4. The method of fabricating an optical interference color display of claim 3, wherein the first electrodes are transparent electrodes, and the first electrodes comprises indium tin oxide (ITO).

5. The method of fabricating an optical interference color display of claim 3, wherein the absorption layer comprises Chromium (Cr) or Molybdenum chromium (MoCr).

6. The method of fabricating an optical interference color display of claim 3, wherein the optical layer comprises silicon nitride or silicon oxide.

7. The method of fabricating an optical interference color display of claim 1, wherein the patterned support layer comprises a photoresist layer.

8. The method of fabricating an optical interference color display of claim 1, wherein the etching rate of the second sacrificial layer is more than 1.5 times of the etching rate of the first sacrificial layer, and the etching rate of the third sacrificial layer is more than 1.5 times of the etching rate of the second sacrificial layer.

9. The method of fabricating an optical interference color display of claim 1, wherein the first sacrificial layer is selected from a group consisting of MoCr, Cr, polysilicon, amorphous silicon and N-type amorphous silicon.

10. The method of fabricating an optical interference color display of claim 1, wherein the second sacrificial layer is selected from a group consisting of MoCr, Cr, polysilicon, amorphous silicon and N-type amorphous silicon.

11. The method of fabricating an optical interference color display of claim 1, wherein the third sacrificial layer is selected from a group consisting of MoCr, Cr, polysilicon, amorphous silicon and N-type amorphous silicon.

12. The method of fabricating an optical interference color display of claim 1, wherein the second electrode layer is a metal electrode, and the second electrode layer is selected from a group consisting of Mo, Mo alloy, aluminum, aluminum alloy, Cr, nickel, titanium, and a combination thereof.