Method for patterning Mo layer in a photovoltaic device comprising CIGS material using an etch process

• US 7,547,569 B2
• Filed: 11/22/2006
• Issued: 06/16/2009
• Est. Priority Date: 11/22/2006
• Status: Expired due to Fees

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Xu, Li, Weidman, Timothy, Borden, Peter G.
• Primary Examiner(s): Lee; Hsien-ming
• Assistant Examiner(s): PARENDO, KEVIN A
• Application Number:
  US11/562,573
• Publication Number:
  US 20080119005A1
• Time in Patent Office: 937 Days
• Field of Search: 438/57, 438/48, 438/84, 438/102
• US Class Current: 438/48
• CPC Class Codes: H01L 31/03923 including AIBIIICVI compound materials, e.g. CIS, CIGS
• CPC Class Codes: H01L 31/0465 comprising particular structures for the electrical interconnection of adjacent PV cells in the module H01L31/0463 takes precedence
• CPC Class Codes: H01L 31/0749 including a AIBIIICVI compound, e.g. CdS/CulnSe2 [CIS] heterojunction solar cells
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
• CPC Class Codes: Y02E 10/50 Photovoltaic [PV] energy
• CPC Class Codes: Y02E 10/541 CuInSe2 material PV cells

Abstract

A processing method described herein provides a method of patterning a MoSe₂ and/or Mo material, for example a layer of such material(s) in a thin-film structure. According to one aspect, the invention relates to etch solutions that can effectively etch through Mo and/or MoSe₂. According to another aspect, the invention relates to etching such materials when such materials are processed with other materials in a thin film photovoltaic device. According to other aspects, the invention includes a process of etching Mo and/or MoSe₂ with selectivity to a layer of CIGS material in an overall process flow. According to still further aspects, the invention relates to Mo and/or MoSe₂ etch solutions that are useful in an overall photolithographic process for forming a photovoltaic cell and/or interconnects and test structures in a photovoltaic device.

Claims

1. A method of processing a thin-film structure comprising:

preparing a metal layer in the thin-film structure, wherein the metal layer comprises one or both of Mo and MoSe₂;

preparing a photovoltaic layer in the thin-film structure; and

etching the prepared metal layer and the prepared photovoltaic layer using a wet etch solution comprising NaClO to thereby remove portions of the metal layer and completely expose a corresponding portion of the thin-film structure underlying the metal layer,

wherein an etch rate at which the etching removes the metal layer is at least 5 times greater than an etch rate at which the etching removes the photovoltaic layer.

2. A method according to claim 1, further including defining a masking layer so as to pattern the metal layer and thereby define the etched portion of the metal layer.

3. A method according to claim 2, wherein the step of defining the masking layer includes depositing a photoresist layer and using photolithography to create a pattern, and wherein the etch rate at which the etching removes the metal layer is at least 5 times greater than an etch rate at which the etching removes the photoresist layer.

4. A method according to claim 1, wherein the etching step includes using a wet etch chemistry.

5. A method according to claim 4, wherein the etched metal layer comprises a conducting film in a solar cell stack.

6. A method according to claim 4, wherein the photovoltaic layer comprises copper, indium, and selenium.

7. A method according to claim 4, wherein the thin-film structure further comprises a different layer comprising CdTe.

8. A method according to claim 4, wherein the photovoltaic layer comprises amorphous silicon.

9. A method according to claim 4, wherein the photovoltaic layer comprises micro- or nano-crystal silicon.

10. A method according to claim 1, wherein the etching step includes using a dry etch chemistry.

11. A method according to claim 1, wherein the etch rate of the metal layer is in excess of 5 Å

/sec.

12. A method according to claim 1, wherein the etching step further includes forming test structures in the thin film structure.

13. A method according to claim 12, wherein intermediate layers in the thin-film structure are removed so that the test structures are formed on a base that includes fewer layers than areas of the thin-film structure in which the intermediate layers are not removed.

14. A method according to claim 12, wherein the test structures are electrically isolated from a photovoltaic device formed in the thin-film structure.