Means to deactivate a contactless device

• US 7,548,164 B2
• Filed: 02/02/2006
• Issued: 06/16/2009
• Est. Priority Date: 10/04/2005
• Status: Active Grant

• Current Assignee: WISeKey Semiconductors
• Original Assignee: Atmel Corporation (Microchip Technology Incorporated)
• Inventors: Guez, Gregory, Bates, Colin
• Primary Examiner(s): TRIEU, VAN THANH
• Application Number:
  US11/346,006
• Publication Number:
  US 20070075140A1
• Time in Patent Office: 1,230 Days
• Field of Search: 340/572.1, 340/572.3, 340/572.7, 340/539.1, 340/539.11, 340/539.21, 340/539.23, 340/539.3, 340/10.1, 340/10.3, 340/10.51, 340/572.4, 235/472.01, 326/37, 326/102
• US Class Current: 340/572.3
• CPC Class Codes: G06K 19/0707 the arrangement being capable of collecting energy from external energy sources, e.g. thermocouples, vibration, electromagnetic radiation G06K19/0702 takes precedence
• CPC Class Codes: G06K 19/0712 the arrangement being capable of triggering distinct operating modes or functions dependent on the strength of an energy or interrogation field in the proximity of the record carrier active means for hindering electromagnetic reading or writing G06K19/07336
• CPC Class Codes: G06K 19/0715 the arrangement including means to regulate power transfer to the integrated circuit
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs

Abstract

A method and apparatus for deactivating an identification device or RFID tag, such as an e-passport or an ID card that has been revoked, has expired, or is invalid. A programmable memory circuit is coupled to a controlling circuit that is coupled to a shorting circuit that may activate or deactivate the operation of the identification device.

Claims

1. A circuit incorporated into an electronic identification device, the circuit comprising:

a power circuit;

a shorting circuit coupled to the power circuit;

a control circuit coupled to the shorting circuit, the control circuit configured to selectively activate or deactivate the shorting circuit and correspondingly deactivate or activate the power circuit;

a programmable memory circuit coupled to the control circuit, the programmable memory circuit configured to store at least one logical state and thereafter maintain the at least one stored logic state without an application of power from any power source, the programmable memory circuit further configured to drive the control circuit based on the at least one stored logic state; and

wherein the control circuit comprises a driving transistor and a control transistor, the control transistor being coupled to both the driving transistor and the programmable memory device.

2. The circuit of claim 1 wherein the power circuit comprises a diode or a diode equivalent component.

3. The circuit of claim 1 wherein the power circuit converts an alternating current signal to a direct current signal.

4. The circuit of claim 1 wherein the programmable memory circuit comprises an EEPROM transistor.

5. A circuit incorporated into a contactless device, the circuit comprising:

an antenna interface circuit;

a power circuit coupled to the antenna interface circuit;

a shorting circuit coupled to the antenna interface circuit;

a control circuit coupled to the shorting circuit, the control circuit configured to selectively activate or deactivate the shorting circuit;

a programmable memory circuit coupled to the control circuit, the programmable memory circuit configured to store at least one logical state and thereafter maintain the at least one stored logic state during a powered or un-powered condition and the programmable memory circuit further configured to drive the control circuit based on the at least one stored logic state; and

wherein the control circuit comprises a driving transistor and a control transistor, the control transistor being coupled to both the driving transistor and the programmable memory device.

6. The circuit of claim 5 wherein the antenna interface circuit comprises an inductor and a capacitor.

7. The circuit of claim 6 wherein the power circuit comprises a diode or diode equivalent component configured in a bridge arrangement.

8. The circuit of claim 6 wherein the power circuit comprises a diode or diode equivalent component configured to convert an alternating current signal to a direct current signal.

9. The circuit of claim 5 wherein the shorting circuit comprises a switching device configured to selectively short the antenna interface circuit.

10. The circuit of claim 5 wherein the shorting circuit comprises a switching device configured to selectively short the power circuit.

11. The circuit of claim 5 wherein the programmable memory circuit comprises an EEPROM transistor having a floating gate.

12. The circuit of claim 5 wherein the contactless device is incorporated into an electronic identification device.

13. A circuit incorporated into a contactless electronic identification device, the circuit comprising:

an oscillating circuit;

a power circuit coupled to the oscillating circuit, the power circuit configured to convert an alternating current signal to a direct current signal;

a shorting device coupled to the oscillating device configured to selectively short the oscillating circuit;

a control circuit coupled to the shorting circuit, the control circuit configured to selectively activate or deactivate the shorting circuit;

a programmable memory device coupled to the control circuit, the programmable memory device having a floating gate structure and configured to drive the control circuit based on a stored logic state; and

wherein the control circuit comprises a driving transistor and a control transistor, the control transistor being coupled to both the driving transistor and the programmable memory device.

14. The circuit of claim 13 wherein the oscillating circuit is coupled to an antenna.

15. The circuit of claim 13 wherein the power circuit comprises a diode or diode equivalent component configured in a bridge arrangement.

16. The circuit of claim 13 wherein the power circuit comprises a diode or diode equivalent component.

17. The circuit of claim 13 wherein the programmable memory device comprises an EEPROM transistor.

18. A method to disable an electronic identification device, the method comprising:

storing a predetermined logic state in a programmable memory device configured to maintain the stored logic state without an application of power from any power source;

biasing a control device, a bias voltage corresponding to the stored logic state in the programmable memory device; and

shorting a power circuit, using a driving transistor and a control transistor, selectively based on the stored logic state in the programmable memory device and the bias voltage on the control device.

19. The method of claim 18 wherein the programmable memory device comprises a memory transistor having a floating gate structure capable of storing the logic state.

20. The method of claim 18 wherein an electromagnetic signal is generated by an electronic identification device reader to generate a power source for the electronic identification device.

21. The method of claim 18 wherein the shorted power circuit comprises diodes or diode equivalent components configured in a bridge arrangement thereby providing direct current to the electronic identification device in proximity to an electronic identification reader.

22. The method of claim 18 wherein the shorted power circuit comprises a diode or diode equivalent component.

23. A contactless electronic identification device comprising:

a means for receiving an electromagnetic signal;

a means for deriving a power source from the electromagnetic signal;

a means for programming and storing a logic state;

a means for maintaining the stored logic state without an application of power from any power source; and

a means for selectively disabling the power source based on the stored logic state, wherein the means for selectively disabling comprises a driving transistor and a control transistor, the control transistor being coupled to both the driving transistor and the means for programming and storing.

24. The device of claim 23 wherein the received electromagnetic signal is generated by an electronic identification device reader.

25. The device of claim 23 wherein deriving a power source from the electromagnetic signal includes converting an alternating current (AC) signal into a direct current (DC) signal.

26. The device of claim 23 wherein maintaining the stored logic state without an application of power from any power source is performed by a storage memory transistor having a floating gate structure.

27. The device of claim 23 wherein selectively disabling the power source is performed by shorting the power source.