Automatic power savings stand-by control for non-volatile memory
First Claim
Patent Images
1. An apparatus, comprising:
- a non-volatile memory array; and
a power saving circuit to modify a chip enable signal that is to enable the non-volatile memory array in response to an absence of activity on an address input to said non-volatile memory array and to place said non-volatile memory array into a standby mode based on the modified chip enable signal.
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Accused Products
Abstract
A non-volatile memory array such as a flash memory array may include a power savings circuit to control a stand-by mode of the non-volatile memory array. The power savings circuit may cause a placement of the non-volatile memory array into a stand-by mode in the absence of activity on at least one or more inputs of the non-volatile memory array. Power may be saved automatically without processor intervention by reducing the operating current of the non-volatile memory array. The automatic power savings circuit may provide a chip enable output to an input of stand-by circuitry to control the operation of the standby circuitry without requiring an explicit stand-by command from a processor.
21 Citations
19 Claims
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1. An apparatus, comprising:
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a non-volatile memory array; and a power saving circuit to modify a chip enable signal that is to enable the non-volatile memory array in response to an absence of activity on an address input to said non-volatile memory array and to place said non-volatile memory array into a standby mode based on the modified chip enable signal. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method, comprising:
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determining whether a change on an address input to a non-volatile memory array is stopped; and in response to determining that the change is stopped, modifying a chip enable signal that is to enable the non-volatile memory array to place the non-volatile memory array into a standby mode based on the modified chip enable signal. - View Dependent Claims (9, 10, 11, 12)
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13. A method comprising:
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in response to determining that there is an absence of activity on an address input to said non-volatile memory array and a cell select input indicates the non-volatile memory array is not selected, modifying a chip enable signal that is to enable a non-volatile memory array to provide a chip enable output; and providing the chip enable output to input of a standby circuit of a non-volatile memory array to cause the standby circuit to activate a standby mode for the non-volatile memory array. - View Dependent Claims (14)
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15. An apparatus, comprising:
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a wireless transceiver; a non-volatile memory array; and a power saving circuit to control a standby mode of the non-volatile memory array, said power saving circuit to modify a chip enable input that is to enable the non-volatile memory array in an event there is no change on an address input to said non-volatile memory array and to activate the standby mode of said non-volatile memory array based on the modified chip enable input. - View Dependent Claims (16, 17, 18, 19)
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Specification