Reverse-biased PN diode decoupling capacitor

• US 7,550,820 B2
• Filed: 08/10/2006
• Issued: 06/23/2009
• Est. Priority Date: 08/10/2006
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Chen, Hsien-Te, Tai, Chun-Hui, Yang, Jen-Hang
• Primary Examiner(s): Pert; Evan
• Assistant Examiner(s): AHMED, SELIM U
• Application Number:
  US11/502,094
• Publication Number:
  US 20080122036A1
• Time in Patent Office: 1,048 Days
• Field of Search: 361/91.5, 357/23.13, 357/42, 257/313, 257/355, 257/173, 257/356, 257/603, 257/E27.073, 257/E29.335, 257/312, 257/594, 257/595, 257/598, 257/599, 257/601, 257/E29.344, 257/E27.049
• US Class Current: 257/601
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 27/0805 Capacitors only
• CPC Class Codes: H01L 27/0814 Diodes only
• CPC Class Codes: H01L 29/8611 Planar PN junction diodes

Abstract

This invention discloses a decoupling capacitor in an integrated circuit, comprising a plurality of dedicated PN diodes with a total junction area greater than one tenth of a total active area of functional devices for which the dedicated PN diodes are intended to protect, a N-type region of the dedicated PN diodes coupling to a positive supply voltage (Vdd), and a P-type region of the dedicated PN diodes coupling to a complimentary lower supply voltage (Vss), wherein the dedicated PN diodes are reversely biased.

Claims

1. A filler cell in an integrated circuit comprising:

one or more dummy elements of one or more predetermined layers;

at least one or more dedicated PN diode, wherein the dedicated PN diode includes;

an N+ region formed in a P-type well, the N+ region being coupled to a positive supply voltage (Vdd) by a first metal; and

the P-type well being coupled to a complimentary lower supply voltage (Vss) by a second metal through a P+ pick-up region formed in the P-type well, wherein a total junction area of the dedicated PN diode formed by the N+ region and the P-type well is greater than one tenth of a total active area of functional devices for which the dedicated PN diode is intended to protect.

2. The filler cell of claim 1, wherein the filler cell is placed in an empty space between at least two functional devices.

3. The filler cell of claim 1, wherein a width or a length of the filler cell is no greater than three times a minimum width of the first or second metal.

4. The filler cell of claim 1, wherein a width or a length of the filler cell is no greater than five times a minimum width of the first or second metal.

5. The filler cell of claim 1, wherein the one or more dummy elements are used for filling up empty spaces to satisfy density rules.

6. The filler cell of claim 1, wherein the first and second metals are made of the same layer.

13. The filler cell of claim 6, wherein the predetermined layer includes metal, well or active region layer.

14. The filler cell of claim 6, wherein the first and second metals are made of the same layer.

7. A filler cell in an integrated circuit comprising:

one or more dummy elements of one or more predetermined layers;

one or more dedicated PN diode, wherein the dedicated PN diode includes;

a P+ region formed within an N-type well, the P+ region being coupled to a complimentary lower supply voltage (Vss) by a first metal; and

the N-type well formed in a P-type substrate, the N-type well being coupled to a positive supply voltage (Vdd) by a second metal through an N+ pick-up region, wherein the dedicated PN diode formed by the P+ region and the N-type well is reversely biased to serve as a decoupling capacitor, and

wherein a total junction area of the dedicated PN diode is greater than one tenth of a total active area of functional devices for which the dedicated PN diode is intended to protect.

8. The filler cell of claim 7, wherein the filler cell is placed in an empty space between at least two functional devices.

9. The filler cell of claim 7, wherein a width or a length of the filler cell is no greater than three times a minimum width of the first or second metal.

10. The filler cell of claim 7, wherein a width or a length of the filler cell is no greater than five times a minimum width of the first or second metal.

11. The filler cell of claim 7, wherein the one or more dummy elements are used for filling up empty spaces to satisfy density rules.

12. The filler cell of claim 7, wherein the filler cell is non-functional element placed in empty areas.

15. A filler cell in an integrated circuit comprising:

one or more dummy elements of one or more predetermined layers;

one or more dedicated PN diode, wherein the dedicated PN diode includes;

a first N+ region formed within an N-type well, the first N+ region being coupled to a positive supply voltage (Vdd) by a first metal;

a first P+ region formed within a P-type well disposed next to the N-type well, the first P+ region being coupled to a complimentary lower supply voltage (Vss) by a second metal; and

a deep N-type well formed in a P-type substrate, the deep N-type well being coupled to the positive supply voltage (Vdd) through a second N+ region formed in the deep N-type well, wherein both the N-type well and the P-type well are formed in the deep N-type well,

wherein the dedicated PN diode formed by the N-type well and the P-type well is reversely biased to serve as a decoupling capacitor, and

wherein a total junction area of the dedicated PN diode is greater than one tenth of a total active area of functional devices for which the dedicated PN diode is intended to protect.

16. The filler cell of claim 15, wherein the filler cell is placed in an empty space between at least two functional devices.

17. The filler cell of claim 15, wherein a width or a length of the filler cell is no greater than three times a minimum width of the first or second metal.

18. The filler cell of claim 15, wherein a width or a length of the filler cell is no greater than five times a minimum width of the first or second metal.

19. The filler cell of claim 15, wherein the one or more dummy elements are used for filling up empty spaces to satisfy density rules.

20. The filler cell of claim 15, wherein the first and second metals are made of the same layer.