Packaged microelectronic devices and methods for packaging microelectronic devices
First Claim
1. A packaged semiconductor device, comprising:
- a substrate having a substrate surface and a recess extending from the substrate surface into the substrate;
a semiconductor die in the recess, the semiconductor die having an integrated circuit and a bond site proximate to the substrate surface;
an electric coupler having a first end on the bond site of the semiconductor die and a second end opposit the first end;
a dielectric layer having a first portion over the semiconductor die and the electric coupler and a second portion in the recess of the substrate, the first portion of the dielectric layer having a first surface proximate to the substrate surface and a second surface opposit the first surface the first portion of the dielectric layer having a thickness between the first and second surfaces, the thickness being approximately equal to a height of the electric coupler between the first and second ends; and
a conductive link on the dielectric layer and in direct contact with the electric coupler, wherein the conductive link and the electric coupler are separate components with a boundary therebetween.
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Accused Products
Abstract
Packaged microelectronic devices and methods for packaging microelectronic devices are disclosed herein. In one embodiment, a method of packaging a microelectronic device including a microelectronic die having a first side with a plurality of bond-pads and a second side opposite the first side includes forming a recess in a substrate, placing the microelectronic die in the recess formed in the substrate with the second side facing toward the substrate, and covering the first side of the microelectronic die with a dielectric layer after placing the microelectronic die in the recess. The substrate can include a thermal conductive substrate, such as a substrate comprised of copper and/or aluminum. The substrate can have a coefficient of thermal expansion at least approximately equal to the coefficient of thermal expansion of the microelectronic die or a printed circuit board.
47 Citations
19 Claims
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1. A packaged semiconductor device, comprising:
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a substrate having a substrate surface and a recess extending from the substrate surface into the substrate; a semiconductor die in the recess, the semiconductor die having an integrated circuit and a bond site proximate to the substrate surface; an electric coupler having a first end on the bond site of the semiconductor die and a second end opposit the first end; a dielectric layer having a first portion over the semiconductor die and the electric coupler and a second portion in the recess of the substrate, the first portion of the dielectric layer having a first surface proximate to the substrate surface and a second surface opposit the first surface the first portion of the dielectric layer having a thickness between the first and second surfaces, the thickness being approximately equal to a height of the electric coupler between the first and second ends; and a conductive link on the dielectric layer and in direct contact with the electric coupler, wherein the conductive link and the electric coupler are separate components with a boundary therebetween. - View Dependent Claims (2, 3, 4, 5, 6, 19)
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7. A packaged semiconductor device, comprising:
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a substrate having a substrate surface and a recess extending from the substrate surface into the substrate; a semiconductor die in the recess and having an integrated circuit and a bond site proximate to the substrate surface; an electric coupler having a first end contacting the bond site of the semiconductor die and a second end opposite the first end; a dielectric layer having a first portion over the semiconductor die and the electric coupler and a second portion in the recess, the first portion of the dielectric layer having a first surface proximate to the substrate surface and a second surface opposite the first surface, wherein the second end of the electric coupler does not project beyond the second surface of the dielectric layer; and a conductive link on the second surface of the dielectric layer and in electrical communication with the electric coupler, wherein the conductive link and the electric coupler are separate components with a boundary therebetween wherein the electric coupler has a height between the first end and the second end, and wherein the height of the electric coupler is approximately equal to a distance between the first and second sufaces of the dielectric layer. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A packaged semiconductor device, comprising:
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a substrate having a substrate surface and a recess extending from the substrate surface into the substrate; a semiconductor die in the recess and having a first side with a bond site and a second side opposite the first side; and a redistribution assembly coupled to the substrate, the redistribution assembly having an electric coupler having a first end on the bond site of the semiconductor die, and a second end opposit the first end a dielectric layer having a first portion over the first side of the semiconductor die and the electric coupler and a second portion in the recess, the first portion of the dielectric layer having a first surface proximate to the substrate surface and a second surface opposite the first surface and a conductive link on the dielectric layer and in physical contact with the electric coupler, wherein the conductive link and the electric coupler are separate components with a boundary therebetween wherein the electric coupler has a height between the first end and the second end, and wherein the height of the electric coupler is approximately equal to a distance between the first and second surfaces of the dielectric layer. - View Dependent Claims (14, 15, 16, 17, 18)
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Specification