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Programmable logic device with on-chip nonvolatile user memory

  • US 7,550,994 B1
  • Filed: 01/29/2007
  • Issued: 06/23/2009
  • Est. Priority Date: 01/09/2004
  • Status: Expired due to Term
First Claim
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1. An integrated circuit comprising:

  • a programmable logic array portion comprising a plurality of logic array blocks configurable to implement user-defined logic functions; and

    a nonvolatile memory portion coupled to the programmable logic array portion, wherein the nonvolatile memory portion comprises;

    a boot data partition to store configuration data;

    a user data partition to store information to be accessed by an application running on the programmable logic array portion;

    a first data port for data read access to the boot data partition; and

    a second data port for data read access to the user data partition.

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