Apparatus for re-ordering video data for displays using two transpose steps and storage of intermediate partially re-ordered video data

• US 7,551,185 B2
• Filed: 12/08/2003
• Issued: 06/23/2009
• Est. Priority Date: 12/20/2002
• Status: Expired due to Fees

• Current Assignee: Dynamic Data Technologies LLC
• Original Assignee: NXP B.V. (NXP Semiconductors NV)
• Inventors: Beuker, Rob Anne, Hekstra, Gerben Johan, Poot, Teunis
• Primary Examiner(s): Amini, Javid A
• Application Number:
  US10/540,103
• Publication Number:
  US 20060061600A1
• Time in Patent Office: 2,024 Days
• Field of Search: 345/3.2, 345/600, 345/649
• US Class Current: 345/649
• CPC Class Codes: G09G 2310/0224 Details of interlacing
• CPC Class Codes: G09G 2310/0229 De-interlacing
• CPC Class Codes: G09G 2360/02 Graphics controller able to handle multiple formats, e.g. input or output formats
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/2022 using sub-frames
• CPC Class Codes: G09G 3/3607 for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels display of colours in flat matrix panels other than liquid crystal displays G09G3/2003; grey scales specific for television H04N3/127
• CPC Class Codes: G09G 5/005 Adapting incoming signals to the display format of the display terminal
• CPC Class Codes: G09G 5/006 Details of the interface to the display terminal specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04
• CPC Class Codes: G09G 5/363 Graphics controllers

Abstract

A generic apparatus (14) re-orders video data for various types of displays, such as plasma discharge panels (PDPs), digital micro-mirror devices (DMDs), liquid crystal on silicon (LCOS) devices, and transpose scan cathode ray tube (CRT) displays. In one embodiment, the apparatus (14) includes a first programmable transpose processor (18), a memory (20, 120), and a second programmable transpose processor (22, 122) fabricated as a single IC unit.

Claims

1. An apparatus for re-ordering video data for a display, comprising:

a) a first transpose means for receiving video data and performing a first transpose process on such video data to create partially re-ordered video data;

b) a means for storing the partially re-ordered video data; and

c) a second transpose means for reading the partially re-ordered video data and performing a second transpose process on such partially re-ordered video data to create fully re-ordered video data,

wherein the first and second transpose means are configured to perform the first and second transpose processes to convert the received video data to the fully re-ordered video data that is a transposed video data of the received video data, the fully re-ordered video data being compatible to a transposed scanning technique for driving the display, wherein the first transpose means includes means for receiving RGB video data and writing at least one frame of the RGB video data to the storing means, and means for separating the RGB video data into separate R, G, and B separation video data and writing at least one frame of the separation video data, at least one frame of the G separation video data, and at least one frame of the B separation video data to the storing means, and wherein the second transpose means includes;

a means for addressing the RGB video data stored in the storing means;

a means for reading the RGB video data stored in the storing means to created fully re-ordered RGB video data;

a means for communicating the fully re-ordered RGB video data to downstream modules of a display processing system;

a means for addressing the R, G, and B separation video data stored in the storing means;

a means for reading the R, G, and B separation video data stored in the storing means;

a means for re-ordering the R, G, and B separation video data into fully re-ordered R, G, and B color bar video data having consecutive downwardly scrolling R, G, and B scan lines; and

a means for communicating the fully re-ordered R, G, and B color bar video data to the downstream modules of the display processing system.

2. The apparatus as set forth in claim 1 wherein the first and second transpose means include:

one or more programmable hardware blocks.

3. The apparatus as set forth in claim 1 wherein:

the first transpose means includes a first programmable processor and the second transpose means includes a second programmable processor, such that the apparatus is programmable for any of a plurality of display formats.

4. The apparatus as set forth in claim 3 wherein the first and second processors are fabricated on a common substrate (S).

5. The apparatus as set forth in claim 4 wherein the storing means includes computer memory which is fabricated on the common substrate.

6. The apparatus as set forth in claim 4 wherein the storing means includes a separate IC that is electrically connected with the first and second programmable processors.

7. The apparatus as set forth in claim 3 wherein the first and second processors are programmable to re-order video data for two or more types of displays selected from the group consisting of a transpose scan CRT display, an LCOS device, a PDP, a monochrome DMD, and a color DMD.

8. The apparatus as set forth in claim 1, the storing means including:

a means for storing at least two consecutive frames of the partially re-ordered video data.

9. The apparatus as set forth in claim 8 wherein the second transpose means includes a processor programmed to read the partially re-ordered video data associated with a first frame from the storing means while the first transpose means writes the partially re-ordered video data associated with a second frame to the storing means.

10. The apparatus as set forth in claim 1, the reading means including:

a means for identifying an operational configuration for the receiving means based on a selected display.

11. The apparatus as set forth in claim 1, the receiving means including:

a means for generating a plurality of sub-fields associated with a frame of the received video data, wherein each sub-field includes sub-field video data associated with the received video data; and

a means for writing the sub-field video data for the plurality of sub-fields to the storing means.

12. The apparatus as set forth in claim 11, the generating means including:

a means for temporarily storing a predetermined amount of sub-field data that is generated serially, wherein the writing means transfers the predetermined amount of sub-field data from the temporary storing means to the storing means in parallel.

13. The apparatus as set forth in claim 11, the storing means including:

a means for storing the sub-field video data for the plurality of sub-fields.

14. The apparatus as set forth in claim 13, the reading means including:

a means for addressing the sub-field video data for the plurality of sub-fields in the storing means;

a means for reading the sub-field video data for the plurality of sub-fields in the storing means to create a fully re-ordered sub-field video data; and

a means for communicating the fully re-ordered sub-field video data to downstream modules of a display processing system.

15. The apparatus as set forth in claim 11 wherein the sub-fields are RGB sub-fields and the sub-field data is RGB sub-field data.

16. The apparatus as set forth in claim 11, the generating means including:

a means for temporarily storing a predetermined amount of RGB sub-field data that is generated serially, wherein the writing means transfers the predetermined amount of RGB sub-field data from the temporary storing means to the storing means in parallel.

17. The apparatus as set forth in claim 15, the storing means including:

a means for storing the RGB sub-field video data for the plurality of RGB subfields.

18. The apparatus as set forth in claim 17, the reading means including:

a means for addressing the RGB sub-field video data for the plurality of RGB sub-fields in the storing means;

a means for reading the RGB sub-field video data for the plurality of RGB sub-fields in the storing means to create a fully re-ordered RGB sub-field video data; and

a means for communicating the fully re-ordered RGB sub-field video data to downstream modules of a display processing system.

19. The apparatus as set forth in claim 1, the receiving means including:

a means for generating a plurality of R separation sub-fields associated with a frame of the R separation video data, wherein each R separation sub-field includes R separation sub-field video data associated with the R separation video data;

a means for generating a plurality of G separation sub-fields associated with a frame of the G separation video data, wherein each G separation sub-field includes G separation sub-field video data associated with the G separation video data;

a means for generating a plurality of B separation sub-fields associated with a frame of the B separation video data, wherein each B separation sub-field includes B separation sub-field video data associated with the B separation video data; and

a means for writing the R separation sub-field video data for the plurality of R separation sub-fields, the G separation sub-field video data for the plurality of G separation sub-fields, and the B separation sub-field video data for the plurality of B separation sub-fields to the storing means.

20. The apparatus as set forth in claim 19, the storing means including:

a means for storing the R separation sub-field video data for the plurality of R separation sub-fields;

a means for storing the G separation sub-field video data for the plurality of G separation sub-fields; and

a means for storing the B separation sub-field video data for the plurality of B separation sub-fields.

21. The apparatus as set forth in claim 20, the reading means including:

a means for addressing the R separation sub-field video data for the plurality of R separation sub-fields in the storing means;

a means for reading the R separation sub-field video data for the plurality of R separation sub-fields in the storing means to create fully re-ordered R separation sub-field video data;

a means for communicating the fully re-ordered R separation sub-field video data to downstream modules of a display processing system;

a means for addressing the G separation sub-field video data for the plurality of G separation sub-fields in the storing means;

a means for reading the G separation sub-field video data for the plurality of G separation sub-fields in the storing means to create fully re-ordered G separation sub-field video data;

a means for communicating the fully re-ordered G separation sub-field video data to downstream modules of a display processing system;

a means for addressing the B separation sub-field video data for the plurality of B separation sub-fields in the storing means;

a means for reading the B separation sub-field video data for the plurality of B separation sub-fields in the storing means to create fully re-ordered B separation sub-field video data; and

a means for communicating the fully re-ordered B separation sub-field video data to downstream modules of a display processing system.

22. The apparatus as set forth in claim 1, the receiving means including:

a means for identifying an operational configuration for the receiving means based on a selected display.

23. An integrated circuit for re-ordering video data to a selected display format, the integrated circuit comprising:

a substrate;

a first programmable processor fabricated on the substrate and connected with video input and programming terminals, the first programmable processor being configured to perform a first transpose process on the video data to create partially transposed video data;

a second programmable processor fabricated on the substrate and connected with video output and programming terminals, the second programmable processor being configured to perform a second transpose process on the partially transposed video data to create frilly transposed video of the video data; and

a memory electrically connected with the first and second processors to have data written into the memory from the first processor and read out of the memory by the second processor,

wherein the fully transposed video data is compatible to a transposed scanning technique for driving the display, wherein first programmable processor includes means for receiving RGB video data and writing at least one frame of the RGB video data to the memory, and means for separating the RGB video data into separate R, G, and B separation video data and writing at least one frame of the separation video data, at least one frame of the G separation video data, and at least one frame of the B separation video data to the memory, and wherein the second programmable processor includes;

a means for addressing the RGB video data stored in the memory;

a means for reading the RGB video data stored in the memory to created fully re-ordered RGB video data;

a means for communicating the fully re-ordered RGB video data to downstream modules of a display processing system;

a means for addressing the R, G, and B separation video data stored in the memory;

a means for reading the R, G, and B separation video data stored in the memory;

a means for re-ordering the R, G, and B separation video data into fully re-ordered R, G, and B color bar video data having consecutive downwardly scrolling R, G, and B scan lines; and

a means for communicating the fully re-ordered R, G, and B color bar video data to the downstream modules of the display processing system.

24. The integrated circuit as set forth in claim 23 wherein the memory is fabricated on the substrate.

25. A method of converting video data from a first format to a second format comprising:

programming a first processor with a first transform which transforms the first format video data to an intermediate format data for storage in a memory; and

programming a second processor with a second transform which transforms the intermediate format data from the memory into the second video format,

wherein the second format video data is a transposed video data of the first format video data, the second format video data being compatible to a transposed scanning technique for driving the display, and wherein the method further comprises;

receiving RGB video data;

writing at least one frame of the RGB video data to the memory;

separating the RGB video data into separate R, G, and B separation video data;

writing at least one frame of the separation video data, at least one frame of the G separation video data, and at least one frame of the B separation video data to the memory;

addressing the RGB video data stored in the memory;

reading the RGB video data stored in the memory to created fully re-ordered RGB video data;

communicating the frilly re-ordered RGB video data to downstream modules of a display processing system;

addressing the R, G, and B separation video data stored in the memory;

reading the R, G, and B separation video data stored in the memory;

re-ordering the R, G, and B separation video data into fully re-ordered R, G, and B color bar video data having consecutive downwardly scrolling R, G, and B scan lines; and

communicating the fully re-ordered R, G, and B color bar video data to the downstream modules of the display processing system.

26. The method as set forth in claim 25 further including:

supplying the first format video data to the first processor;

transforming the supplied first format video data to the intermediate format data with the first processor;

writing the intermediate format data to the memory;

reading the intermediate format data from the memory with the second processor; and

transforming the intermediate format data to the second format video data.

27. The method as set forth in claim 25 further including:

fabricating the first and second processors and the memory on a common substrate.