Communication device with a self-calibration sleep timer
First Claim
1. A battery operated wireless communication device comprising:
- a wireless receiver operable to receive radio signals carrying digital messages and to extract the digital messages there from;
a reference oscillator operable to produce a reference oscillator clock;
a sleep oscillator operable to produce a sleep oscillator clock; and
a dual mode timer for continually maintaining system time based upon a reference counter output while operating in an active mode and based upon a sleep counter output when operating in a sleep mode, the dual mode timer including;
a reference counter operable to produce the reference counter output based upon the reference oscillator clock and a reference counter modulus when in the active mode;
a sleep counter operable to produce the sleep counter output based upon the sleep oscillator clock and a sleep increment value, wherein the sleep increment value is based upon an estimated number of frames per sleep clock cycle; and
calibration circuitry operable to set the sleep increment value prior to the dual mode timer transitioning from the active mode to the sleep mode.
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Accused Products
Abstract
Provided is a system for operating a communication device (20) for reception of scheduled intermittent information messages (22) with a dual mode timer (70) that extends battery life. A controller (50) schedules the timer (70) to power down all idle components of the device (20) between message receptions in a power saving sleep mode to conserve battery power. During active mode when the device is fully active in reception of messages, the timer (70) uses a reference oscillator (90) with a relatively high frequency to support digital processing by the receiver (26). During sleep mode when only the timer is powered on, a much lower frequency sleep oscillator (96) is used to maintain the lowest possible level of power consumption within the timer itself. The timer (70) has provision for automatic temperature calibration to compensate for timing inaccuracies inherent to the low-power low-frequency crystal oscillator (96) used for the sleep mode. The resultant improvement in timer accuracy during sleep mode eliminates the need for an initial reacquisition period following wake up in active mode, thereby reducing battery drain in active mode as well.
24 Citations
19 Claims
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1. A battery operated wireless communication device comprising:
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a wireless receiver operable to receive radio signals carrying digital messages and to extract the digital messages there from; a reference oscillator operable to produce a reference oscillator clock; a sleep oscillator operable to produce a sleep oscillator clock; and a dual mode timer for continually maintaining system time based upon a reference counter output while operating in an active mode and based upon a sleep counter output when operating in a sleep mode, the dual mode timer including; a reference counter operable to produce the reference counter output based upon the reference oscillator clock and a reference counter modulus when in the active mode; a sleep counter operable to produce the sleep counter output based upon the sleep oscillator clock and a sleep increment value, wherein the sleep increment value is based upon an estimated number of frames per sleep clock cycle; and calibration circuitry operable to set the sleep increment value prior to the dual mode timer transitioning from the active mode to the sleep mode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. Timing circuitry for use within a wireless receiver operable to receive radio signals carrying digital messages and to extract the digital messages there from, the timing circuitry comprising:
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a reference oscillator operable to produce a reference oscillator clock; a sleep oscillator operable to produce a sleep oscillator clock; and a dual mode timer for continually maintaining system time based upon a reference counter output while operating in an active mode and based upon a sleep counter output when operating in a sleep mode, the dual mode timer including; a reference counter operable to produce the reference counter output based upon the reference oscillator clock and the reference counter modulus when in the active mode; a sleep counter operable to produce the sleep counter output based upon the sleep oscillator clock and a sleep increment value, wherein the sleep increment value is based upon an estimated number of frames per sleep clock cycle; and calibration circuitry operable to set the sleep increment value prior to the dual mode timer transitioning from the active mode to the sleep mode. - View Dependent Claims (14, 15, 16, 17, 18, 19)
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Specification