Power semiconductor device
First Claim
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1. A power semiconductor device comprising:
- a semiconductor body having a conduction region of one conductivity, and a base region of another conductivity, said semiconductor body including a first surface;
a trench extending from said first surface through said base region and into said conduction region, said trench including at least two opposing sidewalls and a bottom;
a first gate insulation adjacent one of said sidewalls;
a first gate electrode adjacent said first gate insulation and spanning said base region;
a source region adjacent at least one sidewall of said trench;
a contact region of said another conductivity adjacent said source region;
a source contact electrically connected to said source region and said contact region; and
a Qgd implant region of said another conductivity inside and contained within said base region and disposed directly below and aligned with said contact region, wherein said Qgd implant varies the resistivity of said base region, whereby the resistivity of said base region adjacent said first gate insulation is higher than the resistivity of said Qgd implant region and said Qgd implant is positioned to retard the encroachment of a depletion region into said base region without varying the threshold voltage of the device.
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Abstract
A power semiconductor device which includes an implant region in the base region thereof to reduce Qgd.
13 Citations
17 Claims
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1. A power semiconductor device comprising:
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a semiconductor body having a conduction region of one conductivity, and a base region of another conductivity, said semiconductor body including a first surface; a trench extending from said first surface through said base region and into said conduction region, said trench including at least two opposing sidewalls and a bottom; a first gate insulation adjacent one of said sidewalls; a first gate electrode adjacent said first gate insulation and spanning said base region; a source region adjacent at least one sidewall of said trench; a contact region of said another conductivity adjacent said source region; a source contact electrically connected to said source region and said contact region; and a Qgd implant region of said another conductivity inside and contained within said base region and disposed directly below and aligned with said contact region, wherein said Qgd implant varies the resistivity of said base region, whereby the resistivity of said base region adjacent said first gate insulation is higher than the resistivity of said Qgd implant region and said Qgd implant is positioned to retard the encroachment of a depletion region into said base region without varying the threshold voltage of the device. - View Dependent Claims (2)
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3. A power semiconductor device comprising:
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a semiconductor body having a conduction region of one conductivity, and a base region of another conductivity, said semiconductor body including a first surface; a trench extending from said first surface through said base region and into said conduction region, said trench including at least two opposing sidewalls and a bottom; a first gate insulation adjacent one of said sidewalls; a first gate electrode adjacent said first gate insulation and spanning said base region; a source region adjacent at least one sidewall of said trench; a source contact electrically connected to said source region; a Qgd implant region of said another conductivity in said base region to vary the resistivity of said base region, whereby the resistivity of said base region adjacent said first gate insulation is higher than the resistivity of said Qgd implant region and said Qgd implant is positioned to retard the encroachment of a depletion region into said base region without varying the threshold voltage of the device; a second gate insulation adjacent the other of said sidewalls; a second gate electrode adjacent said second gate insulation and spanning said base region; and a source field electrode having a first portion and a second portion, said first portion of said source field electrode being disposed between said first and said second gate electrodes and insulated from the same by an insulation body, and said second portion of said source field electrode being disposed below said first portion and said gate electrodes, wherein said source contact is electrically connected to said source field electrode. - View Dependent Claims (4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A MOSgated power semiconductor device comprising:
an active area including at least one active cell, said active cell including at least one source region, a contact region adjacent said source region, a source contact electrode connected to said source region and said contact region, an insulated gate electrode, a base region of one conductivity formed adjacent a drift region of another conductivity, and a Qgd implant of the same conductivity as said base region formed directly below said contact region and contained within said base region and spaced from said insulated gate electrode, wherein the resistivity and the position of said Qgd implant region are selected to hinder the movement of a depletion region into said base region without affecting the threshold voltage of the device. - View Dependent Claims (14)
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15. A MOS gated power semiconductor device comprising:
an active area including at least one active cell, said active cell including at least one source region, a source contact electrode connected to said source region, an insulated gate electrode, a base region of one conductivity formed adjacent a drift region of another conductivity, a Qgd implant of the same conductivity as said base region formed in said base region and spaced from said insulated gate electrode, wherein the resistivity and the position of said Qgd implant region are selected to hinder the movement of a depletion region into said base region without affecting the threshold voltage of the device, and an insulated source field electrode extending below said insulated gate electrode and electrically connected to said source contact. - View Dependent Claims (16, 17)
Specification