Integrated circuit device and low noise block down converter including same
First Claim
1. An integrated circuit device which has N inputs and M outputs, each of N input signals supplied to the respective N inputs being divided into two divided input signals,the integrated circuit device comprising:
- N amplification sections each of which amplifies one of said divided input signals;
N bandwidth conversion section each of which subjects, to frequency conversion, the other one of said divided input signals; and
a 2N×
M switch section which (i) receives 2N input signals that are made up of 2N output signals supplied from the N amplification sections and the N bandwidth conversion sections, and (ii) is controlled so as to output a signal, which is selected from said 2N input signals, to an output selected from said M outputs.
1 Assignment
0 Petitions
Accused Products
Abstract
A switch block 1 includes: N inputs; M outputs; N amplification sections each of which amplifies one of each pair of 2N input signals which are generated by dividing N input signals supplied to the N inputs in two; N bandwidth conversion sections each of which subjects, to frequency conversion, the other one of each pair of 2N input signals; and a 2N×M switch section which outputs the 2N output signals, which are supplied from the N amplification sections and the N bandwidth conversion sections, to either: one of the M outputs; or none of the M outputs. With this arrangement, it is possible to provide a signal recombination circuit which can reduce the leakage of the input signals.
15 Citations
15 Claims
-
1. An integrated circuit device which has N inputs and M outputs, each of N input signals supplied to the respective N inputs being divided into two divided input signals,
the integrated circuit device comprising: -
N amplification sections each of which amplifies one of said divided input signals; N bandwidth conversion section each of which subjects, to frequency conversion, the other one of said divided input signals; and a 2N×
M switch section which (i) receives 2N input signals that are made up of 2N output signals supplied from the N amplification sections and the N bandwidth conversion sections, and (ii) is controlled so as to output a signal, which is selected from said 2N input signals, to an output selected from said M outputs. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
-
-
15. A low noise block down converter including a signal recombination circuit with an integrated circuit device,
the integrated circuit device having N inputs and M outputs, each of N input signals supplied to the respective N inputs being divided into two divided input signals, the integrated circuit device including: -
N amplification sections each of which amplifies one of said divided input signals; N bandwidth conversion section each of which subjects, to frequency conversion, the other one of said divided input signals; and a 2N×
M switch section which (i) receives 2N input signals that are made up of 2N output signals supplied from the N amplification sections and the N bandwidth conversion sections, and (ii) is controlled so as to output a signal, which is selected from said 2N input signals, to an output selected from said M outputs.
-
Specification
-
- Resources
-
Current AssigneeSharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
-
Original AssigneeSharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
-
InventorsNakano, Yoshiaki, Sakurai, Shoji
-
Primary Examiner(s)Le; Lana N
-
Application NumberUS11/500,904Publication NumberTime in Patent Office1,056 DaysField of Search455 73- 78, 455/83, 455/560, 455/562.1, 455 302- 306, 455/313, 455/323, 455/334US Class Current455/3.02CPC Class CodesH01Q 1/247 with frequency mixer, e.g. ...H04H 40/90 specially adapted for satel...H04N 7/20 Adaptations for transmissio...
