Method of manufacturing semiconductor device with two-step etching of layer
First Claim
1. A method of manufacturing a semiconductor device, comprising:
- providing a semiconductor substrate;
forming a recess in the substrate along a dicing line of the substrate by etching the substrate from a back surface thereof;
forming a layer that is disposed in the recess and on the back surface of the substrate;
forming a first resist layer on the layer so that the first resist layer has an opening at a predetermined location at a bottom of the recess;
etching the layer using the first resist layer as a mask so as to form a corresponding opening in the layer;
removing the first resist layer to expose the layer;
forming on the exposed layer a second resist layer that corresponds to a predetermined pattern and covers the opening of the layer; and
etching the layer using the second resist layer as a mask so that the predetermined pattern is reflected in the layer.
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Accused Products
Abstract
The invention is directed to improvement of reliability of a process of separating a layer to be patterned such as a wiring layer in a semiconductor device manufacturing method. A wiring layer is formed on a back surface of a semiconductor substrate. A third resist layer (positive resist layer) is formed on the wiring layer, having an opening in a predetermined region along a dicing line at a bottom of the opening, and the wiring layer is etched using the third resist layer as a mask. After the third resist layer is removed, a fourth resist layer (negative resist layer) is formed on the wiring layer so as to leave the wiring layer in a region of a predetermined pattern, and the wiring layer is etched using the fourth resist layer as a mask. The wiring layer is thus patterned so as to form the predetermined pattern and be separated at the predetermined region along the dicing line at the bottom of the opening without fail.
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Citations
20 Claims
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1. A method of manufacturing a semiconductor device, comprising:
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providing a semiconductor substrate; forming a recess in the substrate along a dicing line of the substrate by etching the substrate from a back surface thereof; forming a layer that is disposed in the recess and on the back surface of the substrate; forming a first resist layer on the layer so that the first resist layer has an opening at a predetermined location at a bottom of the recess; etching the layer using the first resist layer as a mask so as to form a corresponding opening in the layer; removing the first resist layer to expose the layer; forming on the exposed layer a second resist layer that corresponds to a predetermined pattern and covers the opening of the layer; and etching the layer using the second resist layer as a mask so that the predetermined pattern is reflected in the layer. - View Dependent Claims (2)
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3. A method of manufacturing a semiconductor device, comprising:
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providing a semiconductor substrate; forming a recess in the substrate along a dicing line of the substrate by etching the substrate from a back surface thereof; forming a layer that is disposed in the recess and on the back surface of the substrate; forming on the layer a first resist layer that corresponds to a predetermined pattern; etching the layer using the first resist layer as mask so that the predetermined pattern is reflected in the layer; removing the first resist layer to expose the patterned layer; forming on the patterned layer a second resist layer that has an opening at a predetermined location at a bottom of the recess; and etching the patterned layer using the second resist layer as a mask so as to form a corresponding opening in the patterned layer. - View Dependent Claims (4)
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5. A method of manufacturing a semiconductor device, comprising:
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providing a semiconductor substrate comprising a first insulation film formed on a front surface of the substrate and a pad electrode formed on the first insulation film along a dicing line of the substrate; attaching a support body to the front surface of the substrate; forming a recess in the substrate along the dicing line by etching the substrate from a back surface thereof, the recess corresponding to the entire length of the dicing line or part of the length; forming a second insulation film to cover the recess and the back surface of the substrate; etching the first and second insulation films at a bottom of the recess so that part of the pad electrode is exposed; forming a wiring layer that is disposed in the recess and on the back surface of the substrate and connected with the exposed pad electrode; forming a first resist layer on the wiring layer so that the first resist layer has an opening at a predetermined location at the bottom of the recess; etching the wiring layer using the first resist layer as a mask so as to form a corresponding opening in the wiring layer; removing the first resist layer to expose the wiring layer; forming on the exposed wiring layer a second resist layer that corresponds to a predetermined pattern and covers the opening of the wiring layer; and etching the wiring layer using the second resist layer as a mask so that the predetermined pattern is reflected in the wiring layer. - View Dependent Claims (6, 7, 8, 9, 10, 11, 12)
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13. A method of manufacturing a semiconductor device, comprising:
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providing a semiconductor substrate comprising a first insulation film formed on a front surface of the substrate and a pad electrode formed on the first insulation film along a dicing line of the substrate; attaching a support body to the front surface of the substrate; forming a recess in the substrate along the dicing line by etching the substrate from a back surface thereof, the recess corresponding to the entire length of the dicing line or part of the length; forming a second insulation film to cover the recess and the back surface of the substrate; etching the first and second insulation films at a bottom of the recess so that part of the pad electrode is exposed; forming a wiring layer that is disposed in the recess and on the back surface of the substrate and connected with the exposed pad electrode; forming on the wiring layer a first resist layer that corresponds to a predetermined pattern; etching the wiring layer using the first resist layer as mask so that the predetermined pattern is reflected in the wiring layer; removing the first resist layer to expose the patterned wiring layer; forming on the patterned wiring layer a second resist layer that has an opening at a predetermined location at the bottom of the recess; and etching the patterned wiring layer using the second resist layer as a mask so as to form a corresponding opening in the patterned wiring layer. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification