Adaptive duty cycle management method and system for radio transmitters

• US 7,558,232 B2
• Filed: 09/09/2005
• Issued: 07/07/2009
• Est. Priority Date: 05/14/2001
• Status: Expired due to Term

• Current Assignee: CalAmp Corporation
• Original Assignee: Dataradio, Inc. (CalAmp Corporation)
• Inventors: Pearl, Norman
• Primary Examiner(s): Phan; Tri H
• Application Number:
  US11/223,221
• Publication Number:
  US 20060067245A1
• Time in Patent Office: 1,397 Days
• Field of Search: 370/314, 370/318, 370/321, 370/326, 370336-337, 370/345, 370/347, 370277-278, 370/282, 370/442, 370/498, 455/13.4, 455/522, 455/127.1, 455/127.5
• US Class Current: 370/321
• CPC Class Codes: H04B 1/036 Cooling arrangements
• CPC Class Codes: H04B 1/38 Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
• CPC Class Codes: H04B 1/3838 Arrangements for reducing RF exposure to the user, e.g. by changing the shape of the transceiver while in use
• CPC Class Codes: H04L 1/1854 Scheduling and prioritising arrangements
• CPC Class Codes: H04L 1/187 Details of sliding window management
• CPC Class Codes: H04L 12/56 Packet switching systems
• CPC Class Codes: H04W 28/10 Flow control between communication endpoints
• CPC Class Codes: H04W 28/18 Negotiating wireless communication parameters

Abstract

A duty cycle management system and method for use in a wireless device having a transmitter which transmits packets in the form of individual packets and/or packet bursts. A controller in combination with an instruction set limits the number of packets transmitted during each time period defined by one time window or adjacent time windows, on a sliding basis, so as to control the duty cycle of transmissions during successive adjacent time windows based on the transmitter'"'"'s output power, to produce that average power output. The transmission of packets is thereby delayed as needed to establish sufficient idle period(s) during one time window or adjacent time windows to apply whatever duty cycle is needed to produce that average power output level limit for the transmitter.

Claims

1. A duty cycle management method for limiting the transmission duty cycle of a transmitter of a wireless device whereby said transmitter transmits packets in the form of individual packets and/or packet bursts, said packet bursts comprising a predetermined maximum number of contiguous packets, said transmitter being operable over a duration measurable as a series of time windows whereby each said time window comprises a predetermined number of timeslots with each timeslot having a predetermined nominal duration, said transmitter being configured for transmitting a packet during one said timeslot and having an associated average power output for said transmitted packets, said method comprising limiting the number of packets transmitted during each time period defined by one time window or adjacent time windows, on a sliding basis, by controlling the duty cycle of transmissions during successive adjacent time windows, based on said transmitter'"'"'s output power, to produce said average power output, whereby the transmission of packets is delayed as needed to establish sufficient idle period(s) during said one time window or adjacent time windows to apply a duty cycle calculated based on said average power output divided by said transmitter'"'"'s output power.

2. A method according to claim 1 comprising incrementing a counter by a first amount (IC) for each timeslot in which a packet is transmitted by said transmitter and decrementing said counter by a second amount (DC) for each idle timeslot and delaying transmission of any further packet if said counter amount exceeds a maximum counter amount equal to said predetermined number of timeslots per time window, whereby the ratio of said first amount (IC) to said second amount (DC) is said duty cycle.

3. A method according to claim 2 whereby said duty cycle is a predetermined value where said transmitter operates at a single power output level, said duty cycle comprises multiple predetermined values where said transmitter operates at multiple discrete power output levels and said duty cycle comprises varying values between maximum and minimum values where said transmitter operates at varying power output levels.

4. A method according to claim 2 whereby the value of one or both of said first amount (IC) and said second amount (DC) is selected in order to realize said duty cycle.

5. A method according to claim 4 including identifying prior to the transmission of a packet the applicable mode of transmission, being either individual packet or packet burst mode and, if said packet burst transmission mode is identified, determining whether the counter amount plus the number of packets in the identified packet burst times said first amount (IC) is equal to or greater than the maximum counter amount and, if it is transmitting an individual packet only and if it isn'"'"'t transmitting said packet burst.

6. A method according to claim 5 and including, where the duty cycle is such that transmission of a single packet burst within one time window would render said counter amount close or equal to said maximum counter amount, transmitting said burst packets only if said counter amount is zero and, if said counter amount has been zero for at least a number of timeslots equal to said predetermined number of timeslots per time window, incrementing said counter by said first amount (IC) or, if said counter amount has not been zero for at least a number of timeslots equal to said predetermined number of timeslots per time window, incrementing said counter by two times said first amount (IC).

7. A method according to claim 5 including providing priority, for transmission, to a predetermined maximum number of acknowledgement packet(s) by permitting transmission of up to maximum number of acknowledgement packet(s) when said counter amount is equal to or greater than said maximum count number but less than a predetermined priority maximum count.

8. A computer-readable medium containing computer instructions executable by a controller in communication with a transmitter of a wireless device, wherein said transmitter is operable over a duration measurable as a series of time windows with each said time window comprising a predetermined number of timeslots, said instructions performing the steps of incrementing a counter by a first amount (IC) for each timeslot in which a packet is transmitted by said transmitter and decrementing said counter by a second amount (DC) for each idle timeslot and delaying transmission of any further packet when said counter amount exceeds a maximum counter amount of said predetermined number of timeslots per time window, whereby the ratio of IC to DC represents a duty cycle of said transmitted packets.

9. A computer-readable medium according to claim 8 wherein said duty cycle is a predetermined value where said transmitter operates at a single power output level, said duty cycle comprises multiple predetermined values where said transmitter operates at multiple discrete power output levels and said duty cycle comprises varying values between maximum and minimum values where said transmitter operates at varying power output levels.

10. A computer-readable medium according to claim 9 wherein said instructions perform the steps of identifying prior to the transmission of a packet the applicable mode of transmission, being either individual packet or packet burst mode, and if said packet burst transmission mode is identified, determining whether the counter amount plus the number of packets in the identified packet burst times said first amount (IC) is equal to or greater than said maximum counter amount and if it is transmitting an individual packet only and if it isn'"'"'t transmitting said packet burst.

11. A computer-readable medium according to claim 10 wherein said instructions include, where the duty cycle is such that transmission of a single packet burst within one time window would render said counter amount close or equal to said maximum counter amount, performing the following steps:

(a) transmitting said burst packets only if said counter amount is zero; and

,

(b) if said counter amount has been zero for at least a number of timeslots equal to said predetermined number of timeslots per time window, incrementing said counter by said first amount (IC) or, if said counter amount has not been zero for at least a number of timeslots equal to said predetermined number of timeslots per time window, incrementing said counter by two times said first amount (IC).

12. A duty cycle management system for use in a wireless device, said wireless device comprising a transmitter for transmitting packets in the form of individual packets and/or packet bursts, said packet bursts comprising a predetermined maximum number of contiguous packets, said transmitter being operable over a duration measurable as a series of time windows with each said time window comprising a predetermined number of timeslots, each said timeslot having a predetermined nominal duration, said transmitter being configured for transmitting a packet during one said timeslot and having an associated average power output for said transmitted packets, said duty cycle management system comprising a controller and a storage medium containing instructions executable by said controller for limiting the number of packets transmitted during each time period defined by one time window or adjacent time windows, on a sliding basis, so as to control the duty cycle of transmissions during successive adjacent time windows based on said transmitter'"'"'s output power, to produce said average power output, whereby the transmission of packets is delayed as needed to establish sufficient idle period(s) during said one time window or adjacent time windows to apply a duty cycle calculated based on said average power output divided by said transmitter'"'"'s output power.

13. A system according to claim 12 comprising a counter wherein said counter is incremented by said first amount (IC) for each timeslot in which a packet is transmitted by said transmitter and said counter is decremented by said second amount (DC) for each idle timeslot, and transmission of any further packet is delayed when said counter amount exceeds a maximum counter amount equal to said predetermined number of timeslots per time window, wherein the ratio of said first amount (IC) to said second amount (DC) is said duty cycle.

14. A system according to claim 13 wherein said duty cycle is a predetermined value where said transmitter operates at a single power output level, said duty cycle comprises multiple predetermined values where said transmitter operates at multiple discrete power output levels and said duty cycle comprises varying values between maximum and minimum values where said transmitter operates at varying power output levels.

15. A system according to claim 14 wherein the applicable mode of transmission, being either individual packet or packet burst mode, is identified prior to the transmission of a packet and, where said packet burst transmission mode is identified, if the counter amount plus the number of packets in the identified packet burst times said first amount (IC) is equal to or greater than the maximum counter amount, only an individual packet is transmitted and otherwise said packet burst is transmitted.

16. A system according to claim 15 wherein the duty cycle is such that transmission of a single packet burst within one time window would render the counter amount close or equal to said maximum counter amount and said burst packets are transmitted only if said counter amount is zero, said counter being incremented by said first amount (IC) if said counter amount has been zero for at least a number of timeslots equal to said predetermined number of timeslots per time window and said counter is incremented by two times said first amount (IC) if said counter amount has not been zero for at least a number of timeslots equal to said predetermined number of timeslots per time window.

17. A system according to claim 15 wherein said controller in combination with said instructions is configured for providing priority, for transmission, to a predetermined maximum number of acknowledgement packet(s) by permitting transmission of up to maximum number of acknowledgement packet(s) when said counter amount is equal to or greater than said first amount divided by said second amount (IC/DC) times said maximum number of packets per packet burst but less than a predetermined maximum count.