Signal switching apparatus and program

• US 7,558,392 B2
• Filed: 09/30/2003
• Issued: 07/07/2009
• Est. Priority Date: 10/03/2002
• Status: Active Grant

• Current Assignee: Yamaha Corporation
• Original Assignee: Yamaha Corporation
• Inventors: Okabayashi, Masaaki
• Primary Examiner(s): Chin; Vivian
• Assistant Examiner(s): Lao; Lun-See
• Application Number:
  US10/676,228
• Publication Number:
  US 20040066792A1
• Time in Patent Office: 2,107 Days
• Field of Search: 381/119, 381/123, 381/81, 381/118, 700/94, 370/419, 370/535
• US Class Current: 381/119
• CPC Class Codes: H04H 60/04 Studio equipment; Interconnection of studios

Abstract

A signal switching apparatus is provided which is capable of performing checking in a manner that a plurality of output channels can be discriminated in checking the assignment of the plurality of output channels to buses to which signals are input. A plurality of signals input to a mix bus comprised of six buses are selectively output to two analog outputs in accordance with assignment performed by an output assigning device. First checking signals for three channels among six channels from a first oscillator are directly input to an adjuster, and first checking signals for the rest of the six channels from the first oscillator are input to a signal switching device. Second checking signals for all of three channels from a second oscillator are input to the checking signal switching device. The checking signal switching device selectively outputs the input first or second checking signals to the adjuster. The adjuster selectively outputs the input first and second checking signals to desired buses and at desired volumes in accordance with settings of the adjuster, and the first and second checking signals are output via respective analog outputs in accordance with settings of the output assigning device.

Claims

1. A signal switching apparatus comprising:

a plurality of buses,

a first oscillator device that generates first checking signals used for checking output path and adapted to provide the generated first checking signals to at least a first group of the plurality of buses;

a second oscillator device that generates second checking signals used for checking output path and is adapted to provide the generated second checking signals to only a second group of the plurality of buses, the first checking signals and the second checking signals different from each other; and

a checking signal input device that causes the second checking signals to be input to the second group of the plurality of buses and causes the first checking signals to be input to the first group of the plurality of buses.

2. A signal switching apparatus according to claim 1,

wherein the first group of the plurality of buses includes two or more buses,

wherein the second group of the plurality of buses includes two or more buses,

wherein the plurality of buses consists of the first group of the plurality of buses and the second group of the plurality of buses, and

wherein the second group of the plurality of buses does not include any of the first group of the plurality of buses.

3. A signal switching apparatus according to claim 1,

wherein the first checking signals and the second checking signals represent a sine waveform.

4. A signal switching apparatus comprising:

a plurality of buses;

a first oscillator device that generates first checking signals used for checking an output path and is capable of providing the generated first checking signals to one or more buses from the plurality of buses;

a second oscillator device that generates second checking signals used for checking an output path and is capable of providing the generated second checking signals to only a group of buses from the plurality of buses, wherein the first checking signals and the second checking signals are different from each other;

a selecting device that selects both the first checking signals and the second checking signals or only the first checking signals as checking signals to be input to all of said plurality of buses, and

a checking signal input device that causes the second checking signals to be input to the group of buses and the first checking signals to be input to the other buses of the plurality of buses if said selecting device selects both the first checking signals and the second checking signals, and causes the first checking signals to be input to all of said plurality of buses if said selecting device selects only the first checking signals.

5. A signal switching apparatus according to claim 4,

wherein the first checking signals and the second checking signals represent a sine waveform.