Circuit design tools with optimization assistance

• US 7,559,046 B1
• Filed: 12/21/2007
• Issued: 07/07/2009
• Est. Priority Date: 11/18/2004
• Status: Expired due to Fees

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Altera Corporation (Intel Corporation)
• Inventors: Wenzler, Michael, Datta, Subroto
• Primary Examiner(s): Chiang; Jack
• Assistant Examiner(s): BOWERS, BRANDON
• Application Number:
  US11/963,591
• Time in Patent Office: 564 Days
• Field of Search: 716/11
• US Class Current: 716/134
• CPC Class Codes: G06F 30/34 for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
• CPC Class Codes: G06F 30/343 Logical level
• CPC Class Codes: G06F 30/392 Floor-planning or layout, e.g. partitioning or placement

Abstract

Computer aided design tools are provided that assist circuit designers in optimizing circuit performance. A circuit designer who is designing an integrated circuit may supply circuit design data and constraint data. Computer aided design tools may process the data to produce output data. The output data may include information on an implementation of the circuit design in a given type of integrated circuit device and may include report data on how the implementation of the circuit design is expected to perform. An optimization assistance tool analyzes the design and constraint data and the report data to identify potential problem areas. Recommendations may be provided to the circuit designer on how to address potential problems. Selectable options are displayed for the circuit designer. By selecting an appropriate option, the circuit designer can automatically launch a tool to make recommended settings adjustments.

Claims

1. A method for providing assistance to a circuit designer, comprising:

with computing equipment, receiving design data and constraint data for a circuit design and producing a corresponding output on a given implementation of the circuit design in an integrated circuit;

with the computing equipment, processing the output and the constraint data to identify a potential problem with resource consumption by the given implementation of the circuit design in the integrated circuit; and

with the computing equipment, recommending a plurality of potential solutions to the potential problem, wherein each of the potential solutions is individually selectable by the circuit designer, and wherein the potential solutions are selected from the group consisting of;

use register packing, modify synthesis options, use time domain multiplexing, and use a larger integrated circuit.

2. The method defined in claim 1 further comprising:

with the computing equipment, presenting at least one selectable option to the circuit designer that allows the circuit designer to automatically modify the constraint data to address the potential problem.

3. The method defined in claim 1 further comprising:

when the circuit designer selects a given one of the potential solutions, automatically directing the computing equipment to display a given portion of a computer-aided design tool user interface for the circuit designer to use in implementing the selected potential solution.

4. The method defined in claim 1 further comprising:

with the computing equipment, processing the output and the constraint data to identify multiple potential problems with the given implementation of the circuit design in the integrated circuit.

5. The method defined in claim 4 further comprising:

with the computing equipment, recommending multiple potential solutions to the multiple potential problems, wherein each of the potential solutions is individually selectable by the circuit designer; and

when the circuit designer selects a given one of the potential solutions, automatically directing the computing equipment to display a given portion of a computer-aided design tool user interface for the circuit designer to use in implementing the selected potential solution.

6. A method for providing assistance to a circuit designer, comprising:

with computing equipment, receiving design data and constraint data for a circuit design and producing a corresponding output on a given implementation of the circuit design in an integrated circuit;

with the computing equipment, processing the output and the constraint data to identify a potential problem with the given implementation of the circuit design;

with the computing equipment, recommending a plurality of potential solutions to the potential problem, wherein each of the potential solutions is individually selectable by the circuit designer;

with the computing equipment, processing the output and the constraint data to identify multiple potential problems with the given implementation of the circuit design in the integrated circuit, wherein the multiple potential problems are selected from the group consisting of;

logic element usage, memory block usage, digital signal processor block usage, input/output usage, and routing resource usage.

7. The method defined in claim 6 further comprising:

with the computing equipment, recommending multiple potential solutions to the multiple potential problems, wherein each of the potential solutions is individually selectable by the circuit designer, and wherein the multiple potential solutions are selected from the group consisting of;

use register packing, modify synthesis options, modify synthesis options, use time domain multiplexing, and use a larger integrated circuit.

8. The method defined in claim 6 further comprising:

with the computing equipment, recommending multiple potential solutions to the multiple potential problems, wherein each of the potential solutions is individually selectable by the circuit designer; and

when the circuit designer selects a given one of the multiple potential solutions, automatically directing the computing equipment to display a given portion of a computer-aided design tool user interface for the circuit designer to use in implementing the selected potential solution.

9. The method defined in claim 6 further comprising:

when the circuit designer selects a given one of the potential solutions, automatically directing the computing equipment to display a given portion of a computer-aided design tool user interface for the circuit designer to use in implementing the selected potential solution.

10. A method for providing assistance to a circuit designer, comprising:

with computing equipment, receiving design data and constraint data for a circuit design and producing a corresponding output on a given implementation of the circuit design in an integrated circuit;

with the computing equipment, processing the output and the constraint data to identify a potential problem with the given implementation of the circuit design;

with the computing equipment, recommending a plurality of potential solutions to the potential problem, wherein each of the potential solutions is individually selectable by the circuit designer, wherein the potential solutions are displayed on a screen in an order that takes into account how important the recommended changes are and how difficult it is to make the recommended changes; and

when the circuit designer selects a given one of the potential solutions, automatically launching a computer-aided design tool to be used by the logic designer in implementing the selected potential solution.

11. The method defined in claim 10 wherein automatically launching the computer-aided design tool comprises automatically providing the computer-aided design tool with information on which design objects are associated with the selected potential solution.

12. The method defined in claim 10 wherein automatically launching the computer-aided design tool comprises automatically providing the computer-aided design tool with information on which design objects and which aspects of the given implementation of the circuit design have settings that can be adjusted with the selected potential solution.

13. A method for providing assistance to a circuit designer, comprising:

with computing equipment, receiving design data and constraint data for a circuit design and producing a corresponding output on a given implementation of the circuit design in an integrated circuit; and

with the computing equipment, processing the output and the constraint data to identify a potential problem with resource consumption by the given implementation of the circuit design in the integrated circuit, wherein the potential problem comprises a potential problem selected from the group consisting of;

logic element usage, memory block usage, digital signal processor block usage, input/output usage, and routing resource usage.