Semiconductor device and manufacturing method thereof
First Claim
1. A semiconductor device comprising:
- a gate wiring over a substrate;
first and second pixels adjacent to each other with the gate wiring interposed therebetween, the first pixel comprising;
a semiconductor layer over the substrate, the semiconductor layer comprising;
a channel forming region;
a first impurity region forming a source region or a drain region containing a single conductivity type impurity element; and
a second impurity region forming an LDD region contacting the channel forming region,an insulating film provided over the semiconductor layer, and covering edges of the semiconductor layer;
a gate electrode having a tapered portion, and provided over the insulating film;
a capacitor comprising a capacitor electrode, a portion of the semiconductor layer overlapped with the capacitor electrode, and a first portion of the insulating film overlapped with the capacitor electrode;
wherein a portion of the second impurity region is overlapped with the gate electrode,wherein a thickness of a second portion of the insulating film overlapped with the gate electrode is thicker than a thickness of a third portion of the insulating film overlapping the second impurity regions,wherein the gate electrode is a portion of the gate wiring, andwherein the semiconductor layer extends in the second pixel.
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Accused Products
Abstract
In a semiconductor device, typically an active matrix display device, the structure of TFTs arranged in the respective circuits are made suitable in accordance with the function of the circuit, and along with improving the operating characteristics and the reliability of the semiconductor device, the manufacturing cost is reduced and the yield is increased by reducing the number of process steps. A semiconductor device has a semiconductor layer, an insulating film formed contacting the semiconductor layer, and a gate electrode having a tapered portion on the insulating film, in the semiconductor device, the semiconductor layer has a channel forming region, a first impurity region for forming a source region or a drain region and containing a single conductivity type impurity element, and a second impurity region for forming an LDD region contacting the channel forming region, a portion of the second impurity region is formed overlapping a gate electrode, and the concentration of the single conductivity type impurity element contained in the second impurity region becomes larger with distance from the channel forming region.
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Citations
27 Claims
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1. A semiconductor device comprising:
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a gate wiring over a substrate; first and second pixels adjacent to each other with the gate wiring interposed therebetween, the first pixel comprising; a semiconductor layer over the substrate, the semiconductor layer comprising; a channel forming region; a first impurity region forming a source region or a drain region containing a single conductivity type impurity element; and a second impurity region forming an LDD region contacting the channel forming region, an insulating film provided over the semiconductor layer, and covering edges of the semiconductor layer; a gate electrode having a tapered portion, and provided over the insulating film; a capacitor comprising a capacitor electrode, a portion of the semiconductor layer overlapped with the capacitor electrode, and a first portion of the insulating film overlapped with the capacitor electrode; wherein a portion of the second impurity region is overlapped with the gate electrode, wherein a thickness of a second portion of the insulating film overlapped with the gate electrode is thicker than a thickness of a third portion of the insulating film overlapping the second impurity regions, wherein the gate electrode is a portion of the gate wiring, and wherein the semiconductor layer extends in the second pixel. - View Dependent Claims (2, 3)
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4. A semiconductor device comprising:
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a gate wiring over a substrate; first and second pixels adjacent to each other with the gate wiring interposed therebetween, the first pixel comprising; a semiconductor layer over the substrate, the semiconductor layer comprising; a channel forming region; a first impurity region forming a source region or a drain region containing a single conductivity type impurity element; and a second impurity region forming an LDD region contacting the channel forming region, an insulating film provided over the semiconductor layer, and covering edges of the semiconductor layer; a gate electrode having a tapered portion, and provided over the insulating film; a wiring comprising a first layer, a second layer over the first layer and a third layer over the second layer, and in contact with the semiconductor layer; a pixel electrode on the third layer; a capacitor comprising a capacitor electrode, a portion of the semiconductor layer overlapped with the capacitor electrode, and a first portion of the insulating film overlapped with the capacitor electrode; wherein a portion of the second impurity region is overlapped with the gate electrode, and wherein a thickness of a second portion of the insulating film overlapped with the gate electrode is thicker than a thickness of a third portion of the insulating film overlapping the second impurity region, wherein the gate electrode is a portion of the gate wiring, and wherein the semiconductor layer extends in the second pixel. - View Dependent Claims (5, 6, 7, 8)
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9. A semiconductor device comprising:
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a gate wiring over a substrate; first and second pixels adjacent to each other with the gate wiring interposed therebetween, the first pixel comprising; a semiconductor layer over the substrate, the semiconductor layer comprising; a channel forming region; a first impurity region forming a source region or a drain region containing a single conductivity type impurity element; and a second impurity region forming an LDD region provided between the first impurity region and the channel forming region, an insulating film provided over the semiconductor layer, and covering edges of the semiconductor layer; first and second gate electrodes, each having a tapered portion, and provided over the insulating film, a capacitor comprising a capacitor electrode, a portion of the semiconductor layer overlapped with the capacitor electrode, and a first portion of the insulating film overlapped with the capacitor electrode; wherein a thickness of a second portion of the insulating film overlapped with the first or second gate electrode is thicker than a thickness of a third portion of the insulating film overlapping the second impurity region, wherein each of the first and second gate electrodes is a portion of the gate wiring, and wherein the semiconductor layer extends in the second pixel. - View Dependent Claims (10, 11)
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12. A semiconductor device comprising:
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a gate wiring over a substrate; first and second pixels adjacent to each other with the gate wiring interposed therebetween, the first pixel comprising; a semiconductor layer over the substrate, the semiconductor layer comprising; a channel forming region; a first impurity region forming a source region or a drain region containing a single conductivity type impurity element; and a second impurity region forming an LDD region provided between the first impurity region and the channel forming region, an insulating film provided over the semiconductor layer, and covering edges of the semiconductor layer; first and second gate electrodes, each having a tapered portion, and provided over the insulating film; a capacitor comprising a capacitor electrode, a portion of the semiconductor layer overlapped with the capacitor electrode, and a first portion of the insulating film overlapped with the capacitor electrode; wherein the second impurity region is provided between the first and second gate electrodes, and wherein a thickness of a second portion of the insulating film overlapped with the first or second gate electrode is thicker than a thickness of a third portion of the insulating film overlapping the second impurity regions, wherein each of the first and second gate electrodes is a portion of the gate wiring, and wherein the semiconductor layer extends in the second pixel. - View Dependent Claims (13, 14)
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15. A semiconductor device comprising:
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a gate wiring over a substrate; first and second pixels adjacent to each other with the gate wiring interposed therebetween, the first pixel comprising; a semiconductor layer over the substrate, the semiconductor layer comprising; a channel forming region; a first impurity region forming a source region or a drain region containing a single conductivity type impurity element; and a second impurity region forming an LDD region provided between the first impurity region and the channel forming region, an insulating film provided over the semiconductor layer, and covering edges of the semiconductor layer; first and second gate electrodes, each having a tapered portion, and provided over the insulating film, a wiring comprising a first layer, a second layer over the first layer and a third layer over the second layer, and in contact with the semiconductor layer; and a pixel electrode on the third layer, a capacitor comprising a capacitor electrode, a portion of the semiconductor layer overlapped with the capacitor electrode, and a first portion of the insulating film overlapped with the capacitor electrode; wherein a thickness of a second portion of ting film overlapped with the first or second gate electrode is thicker than a thickness of a third portion of the insulating film overlapping the second impurity region, wherein each of the first and second gate electrodes is a portion of the gate wiring, and wherein the semiconductor layer extends in the second pixel. - View Dependent Claims (16, 17, 18, 19)
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20. A semiconductor device comprising:
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a gate wiring over a substrate; first and second pixels adjacent to each other with the gate wiring interposed therebetween, the first pixel comprising; a semiconductor layer over the substrate, the semiconductor layer comprising; a channel forming region; a first impurity region forming a source region or a drain region containing a single conductivity type impurity element; and a second impurity region forming an LDD region provided between the first impurity region and the channel forming region, an insulating film provided over the semiconductor layer, and covering edges of the semiconductor layer; first and second gate electrodes, each having a tapered portion, and provided over the insulating film; a wiring comprising a first layer, a second layer over the first layer and a third layer over the second layer, and in contact with the semiconductor layer; and a pixel electrode on the third layer, a capacitor comprising a capacitor electrode, a portion of the semiconductor layer overlapped with the capacitor electrode, and a first portion of the insulating film overlapped with the capacitor electrode; wherein the second impurity region is provided between the first and second gate electrodes, and wherein a thickness of a second portion of the insulating film overlapped with the first or second gate electrode is thicker than a thickness of a third portion of the insulating film overlapping the second impurity region, wherein each of the first and second gate electrodes is a portion of the gate wiring, and wherein the semiconductor layer extends in the second pixel. - View Dependent Claims (21, 22, 23, 24)
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25. A semiconductor device comprising:
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a pate wiring over a substrate; first and second pixels adjacent to each other with the gate wiring interposed therebetween, the first pixel comprising; a semiconductor layer over the substrate, the semiconductor layer comprising; a channel forming region; a first impurity region forming a source region or a drain region containing a single conductivity type impurity element; and a second impurity region forming an LDD region provided between the channel forming region and the first impurity region, an insulating film provided over the semiconductor layer, and covering edges of the semiconductor layer; a gate electrode having a tapered portion, and provided over the insulating film; a capacitor comprising a capacitor electrode, a portion of the semiconductor layer overlapped with the capacitor electrode, and a first portion of the insulating film overlapped with the capacitor electrode; wherein a thickness of a second portion of the insulating film overlapped with the gate electrode is thicker than a thickness of a third portion of the insulating film overlapping the second impurity region, wherein the gate electrode is a portion of the gate wiring, and wherein the semiconductor layer extends in the second pixel. - View Dependent Claims (26, 27)
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Specification