Memory hub and method for memory sequencing
First Claim
Patent Images
1. A memory module, comprising:
- at least one memory device; and
a memory hub, comprising;
a link interface operable to receive memory requests for access to memory cells in the at least one memory device;
a memory device interface coupled to the at least one memory device, the memory device interface being operable to couple memory requests received by the link interface to the at least one memory device for access to memory cells in the at least one memory device and to receive read data responsive to at least some of the memory requests;
a performance determining device coupled to the memory device interface, the performance determining device operable to track at least one performance metric; and
a performance adjuster operable to adjust operability of the memory device or memory hub responsive to the performance metric tracked by the performance determining device.
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Accused Products
Abstract
A memory module includes a memory hub coupled to several memory devices. The memory hub includes at least one performance counter that tracks one or more system metrics—for example, page hit rate, prefetch hits, and/or cache hit rate. The performance counter communicates with a memory sequencer that adjusts its operation based on the system metrics tracked by the performance counter.
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Citations
28 Claims
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1. A memory module, comprising:
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at least one memory device; and a memory hub, comprising; a link interface operable to receive memory requests for access to memory cells in the at least one memory device; a memory device interface coupled to the at least one memory device, the memory device interface being operable to couple memory requests received by the link interface to the at least one memory device for access to memory cells in the at least one memory device and to receive read data responsive to at least some of the memory requests; a performance determining device coupled to the memory device interface, the performance determining device operable to track at least one performance metric; and a performance adjuster operable to adjust operability of the memory device or memory hub responsive to the performance metric tracked by the performance determining device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A memory hub, comprising:
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a link interface receiving memory requests; a memory device interface operable to transmit memory requests received by the link interface and to receive read data responsive to at least some of the memory requests; a performance determining device coupled to the memory device interface, the performance determining device operable to track at least one performance metric; and a performance adjuster coupled to the performance determining device and the memory device interface, the performance adjuster being operable to cause the memory device interface to output memory device operability adjustment commands responsive to the performance metric tracked by the performance determining device. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A processor-based system, comprising:
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a processor; a controller coupled to the processor, the controller having an input port and an output port; an input device coupled to the processor; an output device coupled to the processor; a storage device coupled to the processor; a plurality of memory modules, each of the memory modules comprising; at least one memory device; and a memory hub, comprising; a link interface operable to receive memory requests for access to memory cells in the at least one memory device; a memory device interface coupled to the at least one memory device, the memory device interface being operable to couple memory requests received by the link interface to the at least one memory device for access to memory cells in the at least one memory device and to receive read data responsive to at least some of the memory requests; a performance determining device coupled to the memory device interface, the performance determing device operable to track at least one performance metric; and a performance adjusting device operable to adjust operability of the processor, controller, at least one memory device or memory hub responsive to the performance metric tracked by the performance determining device. - View Dependent Claims (17, 18, 19, 20, 21, 22)
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23. A method of reading data from a memory module, comprising:
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receiving memory requests for access to at least one memory device mounted on the memory module; coupling the memory requests to the at least one memory device responsive to the received memory request, at least some of the memory requests being memory requests to read data; receiving read data responsive to at least some of the read memory requests; tracking at least one performance metric of the memory module; and adjusting the operability of the at least one memory device responsive to the tracked performance metric. - View Dependent Claims (24, 25, 26, 27, 28)
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Specification