System and method for reducing power requirements of microprocessors through dynamic allocation of datapath resources

• US 7,562,243 B1
• Filed: 05/14/2007
• Issued: 07/14/2009
• Est. Priority Date: 12/03/2002
• Status: Active Grant

• Current Assignee: The Research Foundation for The State University of New York (State University of New York)
• Original Assignee: The Research Foundation for The State University of New York (State University of New York)
• Inventors: Ghose, Kanad
• Primary Examiner(s): BUTLER, DENNIS
• Application Number:
  US11/748,411
• Time in Patent Office: 792 Days
• Field of Search: 713/300, 713/320, 713/322, 713/323, 713/324
• US Class Current: 713/324
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: G06F 9/3802 Instruction prefetching
• CPC Class Codes: G06F 9/3814 Implementation provisions of instruction buffers, e.g. prefetch buffer; banks
• CPC Class Codes: G06F 9/3836 Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
• CPC Class Codes: G06F 9/384 Register renaming
• CPC Class Codes: G06F 9/3869 Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking
• CPC Class Codes: G06F 9/5027 the resource being a machine, e.g. CPUs, Servers, Terminals
• CPC Class Codes: G06F 9/5094 where the allocation takes into account power or heat criteria power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

There is provided a system and methods for segmenting datapath resources such as reorder buffers, physical registers, instruction queues and load-store queues, etc. in a microprocessor so that their size may be dynamically expanded and contracted. This is accomplished by allocating and deallocating individual resource units to each resource based on sampled estimates of the instantaneous resource needs of the program running on the microprocessor. By keeping unused datapath resources to a minimum, power and energy savings are achieved by shutting off resource units that are not needed for sustaining the performance requirements of the running program. Leakage energy and switching energy and power are reduced using the described methods.

Claims

1. A method for dynamically controlling allocable resources in a processor, comprising:

(a) estimating a resource need of a target level of processor performance during a period;

(b) defining an allocation of at least a portion of a respective resource in dependence on the estimate for the period; and

(c) determining an actual demand for the respective resource during the period, and if an actual demand for the respective resource exceeds the allocated portion of the respective resource, increasing an allocation of the respective resource during the period,

wherein;

said processor has an instruction processing rate when all allocable resources are allocated, and wherein the resource allocation in accordance with the estimate is predicted to be sufficient to maintain the instruction processing rate;

said processor has a maximum data processing performance, and wherein the resource allocation in accordance with the estimate is predicted to be sufficient to maintain the maximum data processing performance;

or

said processor has a base data processing performance, and wherein the resource allocation in accordance with the estimate is predicted to be sufficient to maintain the instantaneous data processing performance within a predetermined range from the base data processing performance, wherein the base performance corresponds to the performance of the processor when all allocable resources are allocated.

2. The method according to claim 1, wherein each respective resource has a first power dissipation in an allocated state and a second power dissipation in a deallocated state, said first power dissipation being greater than said second power dissipation.

3. The method according to claim 1, wherein each respective resource has a first energy consumption in an allocated state and a second energy consumption in a deallocated state, said first energy consumption being greater than said second energy consumption.

4. The method according to claim 1, wherein said processor has an instruction processing rate when all allocable resources are allocated, and wherein the resource allocation in accordance with the estimate is predicted to be sufficient to maintain the instruction processing rate.

5. The method according to claim 1, wherein said processor has a maximum data processing performance, and wherein the resource allocation in accordance with the estimate is predicted to be sufficient to maintain the maximum data processing performance.

6. The method according to claim 1, wherein said processor has a base data processing performance, and wherein the resource allocation in accordance with the estimate is predicted to be sufficient to maintain the instantaneous data processing performance within a predetermined range from the base data processing performance, wherein the base performance corresponds to the performance of the processor when all allocable resources are allocated.

7. The method according to claim 1, wherein said estimating step determines, within a sampling period, a resource surplus.

8. A method for dynamically controlling a processor, comprising:

(a) estimating a target level of performance required for the processor during a period;

(b) defining, in dependence on the estimate, for the period, at least one of a clock frequency for a portion of the processor and a level of allocation of at least a portion of a resource;

(c) determining an actual requirement for a level of performance during the period, and if an actual requirement for the level of performance exceeds that available, at least one of increasing the frequency during the period and increasing an allocation of the resource during the period

wherein;

said processor has a maximum data processing performance, and wherein the defined at least one of a clock frequency for a portion of the processor in dependence on the estimate for the period and a level of allocation of at least a portion of a resource are predicted to be sufficient to maintain the maximum data processing performance;

or

said processor has a base data processing performance, and wherein the defined at least one of a clock frequency for a portion of the processor in dependence on the estimate for the period and a level of allocation of at least a portion of a resource are predicted to be sufficient to maintain the instantaneous data processing performance within a predetermined range from the base data processing performance, wherein the base performance corresponds to the performance of the processor when all allocable resources are allocated.

9. The method according to claim 8,

said defining step comprising defining a clock frequency and allocation of resources sufficient to maintain the target level of performance;

and

said determining step determining an actual requirement for a level of performance during the period, and if an actual requirement for the level of performance exceeds that available at the defined frequency, increasing both the frequency and the resource allocation during the period.

10. The method according to claim 8, wherein each resource at a respective frequency has a first power dissipation in an allocated state and a second power dissipation in a deallocated state, said first power dissipation being greater than said second power dissipation.

11. The method according to claim 8, wherein each allocable resource at a respective frequency has a first energy consumption in an allocated state and a second energy consumption in a deallocated state, said first energy consumption being greater than said second energy consumption.

12. The method according to claim 8, wherein said processor has a maximum data processing performance, and wherein the defined at least one of a clock frequency for a portion of the processor in dependence on the estimate for the period and a level of allocation of at least a portion of a resource are predicted to be sufficient to maintain the maximum data processing performance.

13. The method according to claim 8, wherein said processor has a base data processing performance, and wherein the defined at least one of a clock frequency for a portion of the processor in dependence on the estimate for the period and a level of allocation of at least a portion of a resource are predicted to be sufficient to maintain the instantaneous data processing performance within a predetermined range from the base data processing performance, wherein the base performance corresponds to the performance of the processor when all allocable resources are allocated.

14. The method according to claim 8, wherein said estimating step determines, within a sampling period, a resource surplus.

15. A dynamically controlled processor, comprising:

(a) a control for defining, during a period, at least one of a clock frequency for a portion of the processor and a level of allocation of at least a portion of a resource;

(b) at least one unit for

(i) estimating, for a forthcoming period, at least one of a required clock frequency and an allocation of one or more resources, to maintain a processor performance at a target level, and

(ii) determining an actual processor performance deficit with respect to the target level of processor performance to meet processing needs during the period, and if an actual processor performance deficit exists, at least one of increasing the clock frequency during the period and increasing an allocation of the one or more resources during the period, and

(iii) producing a signal for the control in dependence thereon,

wherein at least one of;

the signal controls a clock frequency and allocation of resources sufficient to maintain the target level of performance; and

the unit determines an actual requirement for a level of performance during the period, and if an actual requirement for the level of performance exceeds that available at the defined frequency, increasing both the frequency and the resource allocation during the period;

said processor has a maximum data processing performance, and wherein the defined at least one of a clock frequency for a portion of the processor in dependence on the estimate for the period and a level of allocation of at least a portion of a resource are predicted to be sufficient to maintain the maximum data processing performance; and

said processor has a base data processing performance, and wherein the defined at least one of a clock frequency for a portion of the processor in dependence on the estimate for the period and a level of allocation of at least a portion of a resource are predicted to be sufficient to maintain the instantaneous data processing performance within a predetermined range from the base data processing performance, wherein the base performance corresponds to the performance of the processor when all allocable resources are allocated.

16. The processor according to claim 15, wherein:

the signal controls a clock frequency and allocation of resources sufficient to maintain the target level of performance; and

the unit determines an actual requirement for a level of performance during the period, and if an actual requirement for the level of performance exceeds that available at the defined frequency, increasing both the frequency and the resource allocation during the period.

17. The processor according to claim 15, wherein each resource at a respective frequency has a first power dissipation in an allocated state and a second power dissipation in a deallocated state, said first power dissipation being greater than said second power dissipation.

18. The processor according to claim 15, wherein each allocable resource at a respective frequency has a first energy consumption in an allocated state and a second energy consumption in a deallocated state, said first energy consumption being greater than said second energy consumption.

19. The processor according to claim 15, wherein said processor has a maximum data processing performance, and wherein the defined at least one of a clock frequency for a portion of the processor in dependence on the estimate for the period and a level of allocation of at least a portion of a resource are predicted to be sufficient to maintain the maximum data processing performance.

20. The processor according to claim 15, wherein said processor has a base data processing performance, and wherein the defined at least one of a clock frequency for a portion of the processor in dependence on the estimate for the period and a level of allocation of at least a portion of a resource are predicted to be sufficient to maintain the instantaneous data processing performance within a predetermined range from the base data processing performance, wherein the base performance corresponds to the performance of the processor when all allocable resources are allocated.