Method of fabricating vertical structure LEDs

• US 7,563,629 B2
• Filed: 09/23/2005
• Issued: 07/21/2009
• Est. Priority Date: 04/09/2002
• Status: Expired due to Term

• Current Assignee: Suzhou Lekin Semiconductor Company Limited
• Original Assignee: LG Electronics, Inc. (LG Corporation)
• Inventors: Yoo, Myung Cheol, Jeong, In-Kwon, Lee, Jong-Lam
• Primary Examiner(s): WILCZEWSKI, MARY A
• Application Number:
  US11/232,957
• Publication Number:
  US 20060099730A1
• Time in Patent Office: 1,397 Days
• Field of Search: 438/459, 438/977, 438/22, 438/455, 438/458, 438/405, 438/34, 438/38, 438/42, 438/46, 438/47, 438/958, 257/E33.025, 257/E33.028, 257/E33.046, 257/E33.048, 257/E21.053
• US Class Current: 438/34
• CPC Class Codes: H01C 7/006 Thin film resistors
• CPC Class Codes: H01C 7/008 Thermistors H01C7/02 - H01C7/06 take precedence
• CPC Class Codes: H01L 27/0802 Resistors only
• CPC Class Codes: H01L 28/20 Resistors
• CPC Class Codes: H01L 33/0025 comprising only AIIIBV compounds
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/36 characterised by the electrodes
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/40 Materials therefor
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: Y10S 438/958 Passivation layer
• CPC Class Codes: Y10S 438/977 Thinning or removal of substrate

Abstract

A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal semiconductor processing techniques. Trenches that define the boundaries of the individual devices are then formed through the semiconductor layers and into the insulating substrate, beneficially by using inductive coupled plasma reactive ion etching. The trenches are then filled with an easily removed layer. A metal support structure is then formed on the semiconductor layers (such as by plating or by deposition) and the insulating substrate is removed. Electrical contacts, a passivation layer, and metallic pads are then added to the individual devices, and the individual devices are then diced out.

Claims

1. A method of producing semiconductor devices, comprising:

growing a plurality of semiconductor layers over a first support layer;

forming an electrode over the plurality of semiconductor layers;

forming a second support layer over the electrode;

forming trenches which extend through the plurality of semiconductor layers by etching the plurality of semiconductor layers, wherein the trenches define a plurality of individual semiconductor devices;

removing the first support layer; and

forming a passivation layer over at least one exposed surface of the semiconductor layers including a side of the semiconductor layers.

2. The method of claim 1, wherein the second support layer includes a metal selected from a group consisting of Cu, Cr, Ni, Au, Ag, Mo, Pt, Pd, W, and Al.

3. The method of claim 1, wherein the second support layer includes titanium nitride.

4. A method of producing a plurality of light emitting diodes, comprising:

growing a plurality of semiconductor layers over a first support layer;

forming a first electrode over one side of the plurality of semiconductor layers;

forming a second support layer over the first electrode;

forming trenches which extend through the plurality of semiconductor layers, wherein the trenches define a plurality of individual light emitting diodes;

removing the first support layer;

forming a passivation layer over at least one exposed surface of the plurality of semiconductor layers including a side of the semiconductor layers; and

forming a second electrode over a second side of the plurality of semiconductor layers, the second side being opposite said one side, wherein the trenches extend into the second support layer.

5. The method of claim 4, wherein the first support layer is an insulating substrate.

6. The method of claim 4, wherein the second support layer is a metallic support layer.

7. The method of claim 4, further comprising:

forming a metal pad on the second electrode.

8. The method of claim 4, wherein forming a second support layer is performed using any one of electroplating, electro-less plating, CVD, and sputtering.

9. A method of producing a plurality of light emitting diodes, comprising:

forming a first GaN-based layer over a first support layer;

forming an active layer over the first GaN-based layer;

forming a second GaN-based layer over the active layer;

forming trenches which extend through the active layer, the GaN based layers and into the first support layer, wherein the trenches define a plurality of individual light emitting diodes;

forming a second support layer over the second GaN-based layer;

removing the first support layer; and

forming a passivation layer over at least one of exposed portions of the first GaN-based layer, of the active layer, and of the second GaN-based layer.

10. The method of claim 9, wherein the first support layer is an insulating substrate.

11. The method of claim 9, wherein the first GaN-based layer is a p-GaN layer and the second GaN-based layer is an n-GaN layer.

12. The method of claim 9, wherein the first GaN-based layer is an n-GaN layer and the second GaN-based layer is a p-GaN layer.

13. The method of claim 9, wherein the active layer is an InGaN/GaN active layer.

14. The method of claim 9, wherein the first GaN-based layer is doped.

15. The method of claim 9, wherein the second support layer is a metallic support layer.

16. The method of claim 15, wherein the metallic support layer includes a metal selected from a group consisting of Cu, Cr, Ni, Au, Ag, Mo, Pt, Pd, W, and Al.

17. The method of claim 15, wherein the metallic support layer includes titanium nitride.

18. The method of claim 15, wherein forming a second support layer is performed using any one of electroplating, electro-less plating, CVD, and sputtering.

19. The method of claim 9, further comprising:

identifying the locations of a plurality of individual light emitting diodes before the second support layer is formed.

20. The method of claim 19, further comprising:

forming a first electrode on each of the plurality of individual light emitting diodes, respectively, wherein the second support layer is formed over the first electrode on each of the plurality of light emitting diodes.

21. The method of claim 20, further comprising:

forming a second electrode on each of the plurality of individual light emitting diodes, respectively.

22. The method of claim 9, further comprising:

filling the trenches to form posts.

23. The method of claim 22, wherein the second support layer extends over the posts.

24. The method of claim 9, wherein forming trenches is performed using inductively coupled plasma reactive ion etching (ICP RIE).

25. The method of claim 9, wherein the passivation layer includes a material selected from a group consisting of Si, N, and O.

26. The method of claim 9, further comprising:

separating individual light emitting diodes.

27. The method of claim 26, wherein separating individual light emitting diodes comprises:

etching into the second support layer.

28. The method of claim 9, wherein removing the first support layer is performed using a laser lift-off procedure.

29. The method of claim 28, wherein the laser lift-off procedure comprises radiating laser light through the first support layer.

30. The method of claim 9, wherein the passivation layer is formed over at least one exposed surface including a side of the semiconductor layers and/or at least a portion of bottom of the first GaN-based layer, of the active layer, and of the second GaN-based layer.

31. A method of producing a plurality of light emitting diodes, comprising:

forming a first GaN-based layer over a first support layer;

forming an active layer over the first GaN-based layer;

forming a second GaN-based layer over the active layer;

forming a first electrode over the second GaN-based layer;

providing a second support layer over the first electrodes;

forming trenches by etching through the first GaN-based layer, the active layer, and the second GaN-based layer;

removing the first support layer;

forming a passivation layer over at least one exposed surface of the first GaN-based layer, the active layer, and the second GaN-based layer; and

forming a second electrode over the first GaN-based layer.

32. The method of claim 31, wherein the first support layer is an insulating substrate.

33. The method of claim 31, wherein the second support layer is a metallic support layer.

34. The method of claim 31, further comprising:

identifying the locations of the plurality of individual light emitting diodes before providing the second support layer.

35. A method of producing a plurality of light emitting diodes, comprising:

forming a first GaN-based layer over a first support layer;

forming an active layer over the first GaN-based layer;

forming a second GaN-based layer over the active layer;

forming a second support layer over the second GaN-based layer;

removing the first support layer;

removing impurities in the first GaN-based layer; and

polishing the exposed portion of the first GaN-based layer using inductively coupled plasma reactive ion etching (ICP RIE).

36. The method of claim 35, wherein removing impurities in the first GaN-based layer comprises:

cleaning an exposed portion of the first GaN-based layer with HCl to remove the impurities.

37. A method of producing semiconductor devices, comprising:

growing a plurality of semiconductor layers over a first support layer;

forming an electrode over the plurality of semiconductor layers;

providing a second support layer over the plurality of semiconductor layers;

forming trenches which extend through the plurality of semiconductor layers by etching the plurality of semiconductor layers, wherein the trenches define a plurality of individual semiconductor devices;

removing the first support layer; and

forming a passivation layer over at least a portion of bottom surface of the semiconductor layers.

38. The method of claim 37, wherein the passivation layer is further formed over at least one exposed surface including a side of the semiconductor layers.

39. The method of claim 37, further comprising:

identifying the locations of the plurality of individual semiconductor devices before providing the second support layer.

40. A method of producing light emitting diodes, comprising:

growing a plurality of semiconductor layers over a first support layer;

forming trenches which extend through the semiconductor layers and into the first support layer, wherein the trenches define the individual light emitting diodes;

forming a second support layer over the plurality of semiconductor layers;

removing the first support layer; and

forming a passivation layer over at least one exposed surface of the semiconductor layers.

41. The method of claim 40, wherein the passivation layer is formed over at least one exposed surface including a side of the semiconductor layers and/or at least a portion of bottom of the semiconductor layers.