Method of fabricating poly-crystalline silicon thin film and method of fabricating transistor using the same

• US 7,563,659 B2
• Filed: 12/06/2004
• Issued: 07/21/2009
• Est. Priority Date: 12/06/2003
• Status: Expired due to Fees

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Jung, Ji-sim, Han, Min-koo, Han, Sang-myeon, Lee, Min-cheol, Park, Young-soo, Park, Kyung-bae, Kwon, Jang-yeon, Noguchi, Takashi, Cho, Se-young, Kim, Do-young
• Primary Examiner(s): CHEN, JACK S J
• Application Number:
  US11/003,326
• Publication Number:
  US 20060008957A1
• Time in Patent Office: 1,688 Days
• Field of Search: 438/166, 438/487
• US Class Current: 438/166
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/02354 using a coherent radiation, e.g. a laser
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02595 polycrystalline
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02686 Pulsed laser beam
• CPC Class Codes: H01L 21/31608 Deposition of SiO2 H01L21/31625, H01L21/31629 and H01L21/31633 take precedence
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate

Abstract

A method of fabricating a poly-Si thin film and a method of fabricating a poly-Si TFT using the same are provided. The poly-Si thin film is formed at a low temperature using inductively coupled plasma chemical vapor deposition (ICP-CVD). After the ICP-CVD, excimer laser annealing (ELA) is performed while increasing energy by predetermined steps. A poly-Si active layer and a SiO₂ gate insulating layer are deposited at a temperature of about 150° C. using ICP-CVD. The poly-Si has a large grain size of about 3000 Å or more. An interface trap density of the SiO₂ can be as high as 10¹¹/cm². A transistor having good electrical characteristics can be fabricated at a low temperature and thus can be formed on a heat tolerant plastic substrate.

Claims

1. A method of fabricating a silicon thin film, the method comprising forming the silicon thin film on a substrate by inductively coupled plasma chemical vapor deposition (ICP-CVD) using a diluted He,

wherein the diluted He is an He/SiH₄ composition and a ratio of He to SiH₄ is in a range from 6 to 12 and a deposition rate of silicon by the ICP-CVD is 2.8 Å

/sec.

2. The method of claim 1, further comprising annealing the deposited silicon thin film.

3. The method of claim 2, wherein the annealing is excimer laser annealing (ELA).

4. The method of claim 3, wherein the ELA is performed while increasing energy by predetermined steps.

5. The method of claim 1, further comprising maintaining the substrate at a temperature of 150°

C. and at a pressure of 22 mTorr until said silicon thin film is formed.