Semiconductor device with a resin-sealed optical semiconductor element

• US 7,566,588 B2
• Filed: 10/13/2006
• Issued: 07/28/2009
• Est. Priority Date: 02/28/2003
• Status: Expired due to Fees

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Kanto Sanyo Semiconductors Company Limited (Panasonic Holdings Corporation), Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Kameyama, Koujiro, Mita, Kiyoshi
• Primary Examiner(s): PIZARRO CRESPO, MARCOS D
• Application Number:
  US11/549,528
• Publication Number:
  US 20070069232A1
• Time in Patent Office: 1,019 Days
• Field of Search: 264/134, 264/135, 264/272.17, 438 25- 27, 438 64- 68, 438106-127, 257/E23.061, 257/E23.116, 257/E25.013, 257/E31.117, 257/E31.118, 257E33056-E33059
• US Class Current: 438/116
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05556 in side view
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05639 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05664 Palladium [Pd] as principal constituent
• CPC Class Codes: H01L 2224/05669 Platinum [Pt] as principal constituent
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/451 with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/49107 on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83 using a layer connector
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 2224/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 24/03 : Manufacturing methods
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/06 : of a plurality of bonding areas
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 27/14618 : Containers
• CPC Class Codes: H01L 27/14685 : Process for coatings or optical elements
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/00015 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed as prior art
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01012 : Magnesium [Mg]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/10155 : being other than a cuboid
• CPC Class Codes: H01L 2924/10157 : at the active surface
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/12043 : Photo diode
• CPC Class Codes: H01L 2924/1532 : the connection portion being formed on the die mounting surface of the substrate
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01L 31/0203 : Containers; Encapsulations , e.g. encapsulation of photodiodesfor photovoltaic devices H01L31/048; for organic photosensitive devices H10K30/80
• CPC Class Codes: H01L 33/486 : adapted for surface mounting
• CPC Class Codes: H01L 33/54 : having a particular shape
• CPC Class Codes: H01L 33/56 : Materials, e.g. epoxy or silicone resin
• CPC Class Codes: H01L 33/62 : Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

To provide a semiconductor device 10, which is thin, compact, and excellent in mechanical strength and humidity resistance. Semiconductor device 10A has a configuration such that in semiconductor device 10A, wherein an optical semiconductor element 14, having a light receiving part or a light emitting part, is sealed in a sealing resin 13, a cover layer 12, covering the top surface of optical semiconductor element 14, is exposed from the top surface of sealing resin 13. Thus in comparison to a related-art example with which the entirety is sealed by a transparent resin, sealing resin 13 can be formed thinly and the thickness of the entire device can be made thin. Furthermore, semiconductor device 10 is arranged using a sealing resin having a filler mixed in. A semiconductor device that is excellent in mechanical strength and humidity resistance can thus be arranged.

Claims

1. A semiconductor device manufacturing method, comprising:

protecting a top surface of a cover layer with a sheet, wherein the cover layer is a part of the semiconductor device and wherein the cover layer covers a top surface of an optical semiconductor element having a light receiving part or a light emitting part; and

sealing, thereafter, the optical semiconductor element with a sealing resin,

wherein sealing the optical semiconductor element is performed using molding dies with one surface of the sheet contacting the cover layer and the other surface of the sheet contacting inner walls of the molding dies.

2. The method of claim 1, wherein the molding dies comprise an upper die and a lower die and the sealing is performed upon adhering the sheet to substantially the entire inner walls of either the upper die or the lower die.

3. The method of claim 1, in which protecting the top surface of the cover layer comprises protecting the top surface of a transparent cover layer.

4. The method of claim 1, in which protecting the top surface of the cover layer comprises protecting the top surface of a glass cover layer.

5. The method of claim 1, in which protecting the top surface of the cover layer with a sheet comprises protecting the top surface of the cover layer with a sheet equal in size to the cover layer.

6. The method of claim 1, wherein sealing the optical semiconductor element comprises exposing a surface of the cover layer from the sealing resin.

7. The method of claim 1, in which sealing the optical semiconductor element with resin comprises sealing the optical semiconductor element with an opaque resin.

8. A semiconductor device manufacturing method comprising:

providing lands and leads on a substrate, wherein the substrate includes a conductive member;

adhering a bottom surface of the substrate onto a first sheet;

covering a top surface of an optical semiconductor element with a cover layer, wherein the cover layer is a part of the semiconductor device;

affixing the optical semiconductor element onto the lands of the substrate;

protecting an upper surface of the cover layer with a second sheet; and

sealing the lands, the leads, and the optical semiconductor elements on the substrate with a sealing resin,

wherein, during sealing, one surface of the second sheet contacts the cover layer and the other surface of the second sheet contacts inner walls of molding dies.

9. The method of claim 8, wherein the molding dies comprise an upper die and a lower die and sealing is performed upon adhering the second sheet to substantially the entire inner walls of either the upper die or the lower die.

10. The method of claim 8, in which covering a top surface of an optical semiconductor element comprises covering the top surface of the optical semiconductor element with a transparent cover layer.

11. The method of claim 8, in which covering a top surface of an optical semiconductor element comprises covering the top surface of the optical semiconductor element with a glass cover layer.

12. The method of claim 8 in which protecting an upper surface of the cover layer with a second sheet comprises protecting the upper surface of the cover layer with a second sheet equal in size to the cover layer.

13. The method of claim 8 wherein sealing the lands, the leads, and the optical semiconductor elements comprises exposing a surface of the cover layer from the sealing resin.

14. The method of claim 8 in which sealing the lands, the leads, and the optical semiconductor elements on the substrate with a sealing resin comprises sealing with an opaque resin.