Layout printability optimization method and system

• US 7,568,179 B1
• Filed: 09/21/2006
• Issued: 07/28/2009
• Est. Priority Date: 09/21/2006
• Status: Expired due to Fees

• Current Assignee: Armen Kroyan, Julia Kroyan
• Original Assignee: Armen Kroyan, Julia Kroyan
• Inventors: Kroyan, Julia, Kroyan, Armen
• Primary Examiner(s): DO, THUAN V
• Application Number:
  US11/523,947
• Time in Patent Office: 1,041 Days
• Field of Search: 716/2, 716/7, 716/19
• US Class Current: 716/51
• CPC Class Codes: G03F 1/36 Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes

Abstract

A layout printability optimization method and system is presented that may be used for enhancing the manufacturability and yield of integrated circuits. The method is based on a mathematical framework, which describes and solves layout printability problems using nonlinear numerical optimization techniques. The means to define an optimization objective, constraint functions, compute function derivatives, and solve the resulting system, are also presented.

Claims

1. A method for improving the printability of a plurality of polygons used in generating masks for the fabrication of an integrated circuit, said method including the steps of:

a) Segmenting said polygons into a plurality of segmented polygons using a computer processor,

b) Defining a nonlinear objective function;

c) Using at least one nonlinear programming method to minimize said nonlinear objective function, wherein this step further includes the steps of;

c1) calculating the printability parameters;

c2) computing said nonlinear objective function;

c3) evaluating the constraints;

c4) deriving an intermediate solution; and

c5) if said intermediate solution does not meet stopping criteria, repeating steps c1) through c5); and

d) Outputting a new set of said plurality of segmented polygons.

2. A method as in claim 1, wherein step b) further includes adding weights to the terms of said nonlinear objective function.

3. A method as in claim 1, wherein step b) further includes adding weights to the criteria of said nonlinear objective function.

4. A method as in claim 1, wherein step b) further includes creating at least one constraint equation for at least one segment of said plural of segmented polygons.

5. A method as in claim 4, wherein said at least one constraint equation is derived from at least one process design rule.

6. A method as in claim 4, wherein said at least one constraint equation is derived from at least one constraint of the physical design of said integrated circuit.

7. A method as in claim 1, wherein said step c2) further includes the steps of:

computing derivatives of said nonlinear objective function; and

wherein said c3) further includes the step of computing derivatives of said constraints.

8. A method as in claim 1,

wherein step a) further includes the step of partitioning said plurality of polygons prior to segmenting said polygons;

and

wherein said steps b) and c) are applied to each of said partitions of said plurality of segmented polygons.

9. A method as in claim 1,

wherein step a) further includes the step of partitioning said plurality of segmented polygons;

and

wherein said steps b) and c) are applied to each of said partitions of said plurality of segmented polygons.

10. A system for improving the printability of a plurality of polygons used in generating masks for the fabrication of an integrated circuit, said system comprising:

means to segment said polygons into a plurality of segmented polygons,

means to define a nonlinear optimization system including a nonlinear objective function;

means to use at least one nonlinear programming method to minimize said nonlinear objective function, further comprising;

means to calculate the printability parameters;

means to compute said nonlinear objective function;

means to evaluate the constraints;

means to derive an intermediate solution; and

means to iterate until stopping criteria are met; and

means to output a new set of said plurality of segmented polygons.

11. A system according to claim 10, wherein said nonlinear optimization system further includes means to add weights to the terms of said nonlinear objective function.

12. A system according to claim 10, wherein said nonlinear optimization system further includes means to add weights to the criteria of said nonlinear objective function.

13. A system according to claim 10, wherein said nonlinear optimization system further includes means to create at least one constraint equation for at least one segment of said plurality of segmented polygons.

14. A system according to claim 13, wherein said at least one constraint equation is derived from at least one process design rule.

15. A system according to claim 13, wherein said at least one constraint equation is derived from at least one constraint of the physical design of said integrated circuit.

16. A system according to claim 10, wherein said means to compute said nonlinear objective function, further includes;

means to compute derivatives of said nonlinear objective function; and

wherein said means to evaluate said constraints further includes means to compute derivatives of said constraints.

17. A system according to claim 10,

wherein said means to segment said polygons into a plurality of segmented polygons further includes partitioning said plurality of polygons prior to segmenting said polygons;

and

wherein said means to define a nonlinear optimization system and said means to use at least one nonlinear programming method are applied to each of said partitions of said plurality of segmented polygons.

18. A system according to claim 10,

wherein said means to segment said polygons into a plurality of segmented polygons further includes partitioning said plurality of segmented polygons;

and

wherein said means to define a nonlinear optimization system and said means to use at least one nonlinear programming method are applied to each of said partitions of said plurality of segmented polygons.