Balanced interconnector

• US 7,568,938 B2
• Filed: 08/07/2008
• Issued: 08/04/2009
• Est. Priority Date: 11/17/2004
• Status: Active Grant

• Current Assignee: Belden Canada ULC (Belden Inc.)
• Original Assignee: Belden CDT (Canada) Inc. (Belden Inc.)
• Inventors: Pelletier, Antoine, Siev, Virak
• Primary Examiner(s): NGUYEN, KHIEM M
• Application Number:
  US12/187,671
• Publication Number:
  US 20080293289A1
• Time in Patent Office: 362 Days
• Field of Search: 439/403, 439/404, 439/405, 439/676, 439/941
• US Class Current: 439/404
• CPC Class Codes: H01R 4/2429 mounted in an insulating base
• CPC Class Codes: Y10S 439/941 Crosstalk suppression

Abstract

There is disclosed a balanced interconnector comprising first and second like connecting elements, each of the connecting elements comprising an elongate centre section and a pair of parallel IDCs opening in substantially opposite directions, the IDCs attached substantially at right angles to and at opposite ends of the elongate centre sections, each of the connecting elements lying in different parallel plains. The first and second connecting elements are arranged such that the elongate centre sections are opposite one another and the IDCs of the first connecting element are not opposite the IDCs of the second connecting element. In a particular embodiment the connecting elements of adjacent pairs of connecting elements are at right angles.

Claims

1. A method of interconnecting first and second conductors of a first pair of conductors respectively with first and second conductors of a second pair of conductors and first and second conductors of a third pair of conductors respectively with first and second conductors of fourth second pair of conductors, the second conductor of the first pair of conductors coupled by a first parasitic capacitance to the first conductor of the third pair of conductors and the first conductor of the second pair of conductors coupled by a second parasitic capacitance to the second conductor of the fourth pair of conductors, wherein the first and second parasitic capacitances are substantially the same, the method comprising:

providing first and second interconnecting elements;

providing a first capacitor having a capacitive value substantially the same as the parasitic capacitances;

coupling said first and second elements with said first capacitor;

interconnecting said first element between the first conductor of the first pair of conductors and the first conductor of the second pair of conductors and said second element between the first conductor of the third pair of conductors and the first conductor of the fourth pair of conductors;

providing third and fourth interconnecting elements;

providing a second capacitor having a capacitive value substantially the same as the parasitic capacitances;

coupling said third and fourth elements with said second capacitor;

interconnecting said third element between the second conductor of the first pair of conductors and the second conductor of the second pair of conductors and said fourth element between the second conductor of the third pair of conductors and the second conductor of the fourth pair of conductors.

2. The method of claim 1, wherein said first and second elements are Tip elements and wherein said third and fourth elements are Ring elements.

3. The method of claim 1, wherein said first capacitor providing act comprises positioning said first and second elements relative to one another such that an outer edge of said first element acts as a first electrode of said first capacitor, an outer edge of said second element acts as a second electrode of said first capacitor and air in between said first element outer edge and said second element outer edge acts as a dielectric of said first capacitor.

4. The method of claim 1, wherein said second capacitor providing act comprises positioning said third and fourth elements relative to one another such that an outer edge of said third element acts as a first electrode of said second capacitor, an outer edge of said fourth element acts as a second electrode of said second capacitor and air in between said third element outer edge and said fourth element outer edge acts as a dielectric of said second capacitor.

5. The method of claim 1, wherein the pairs of conductors are twisted pairs of conductors.

6. The method of claim 1, wherein each of the first conductors is a Tip conductor and each of the second conductors is a Ring conductor.

7. An interconnector for interconnecting first and second conductors of a first pair of conductors with first and second conductors of a second pair of conductors and first and second conductors of a third twisted pair of conductors with first and second conductors of a fourth twisted pair of conductors, the second conductor of the first pair of conductors coupled by a first parasitic capacitance to the first conductor of the third pair of conductors and the first conductor of the second pair of conductors coupled by a second parasitic capacitance to the second conductor of the fourth pair of conductors, wherein the first and second parasitic capacitances are substantially the same, the interconnector comprising:

first and second Tip elements, said first Tip element interconnected between the first conductor of the first pair of conductors and the first conductor of the second pair of conductors and said second Tip element interconnected between the first conductor of the third pair of conductors and the first conductor of the fourth pair of conductors;

first and second Ring elements, said first Ring element interconnected between the second conductor of the first pair of conductors and the second conductor of the second pair of conductors and said second Ring element interconnected between the second conductor of the third pair of conductors and the second conductor of the fourth pair of conductors; and

first and second capacitors between respectively said first and second Tip elements and said first and second Ring elements;

wherein each of said capacitors is substantially equal to the first and second parasitic capacitances.

8. The interconnector of claim 7, wherein each of said elements comprises a first terminal positioned towards a first end and a second terminal positioned towards a second end and further wherein each conductor of the first set of conductors is terminated at a respective one of said first terminals and each conductor of the second set of conductors is terminated at a respective one of said second terminals.

9. The interconnector of claim 8, wherein each pair of the first set of two pairs of conductors and the second set of two pairs of conductors is a twisted pair of conductors and further wherein each of said terminals comprises an IDC.

10. The interconnector of claim 8, wherein each of said terminals is elongate and further wherein each of said terminals is arranged along parallel non-collinear axes.

11. The interconnector of claim 10, wherein each of said elements comprises an elongate connecting portion between said terminals, said connecting portion arranged substantially at right angles to said terminals.

12. The interconnector of claim 7, wherein for each pair of elements, said Tip element is arranged opposite said Ring element as a reverse mirror image.

13. The interconnector of claim 7, wherein said first capacitive coupling is between said Ring element of said first pair of elements and said Tip element of said second pair of elements, said second capacitive coupling is between said Ring element of said second pair of elements and said Tip element of said first pair of elements, said third capacitive coupling is between said Tip element of said first pair of elements and said Tip element of said second pair of elements, and said fourth capacitive coupling is between said Ring element of said first pair of elements and said Ring element of said second pair of elements.

14. The interconnector of claim 7, wherein an outer edge of said first Tip element forms a first electrode of said first capacitor, an outer edge of said second Tip element forms a second electrode of said first capacitor and air in between said first Tip element outer edge and said second Tip element outer edge forms a dielectric of said first capacitor.

15. The interconnector of claim 7, wherein an outer edge of said first Ring element forms a first electrode of said second capacitor, an outer edge of said second Ring element forms a second electrode of said second capacitor and air in between said first Ring element outer edge and said second Ring element outer edge forms a dielectric of said second capacitor.

16. The interconnector of claim 8, wherein each of the first conductors is a Tip and each of the second conductors is a Ring.

17. The interconnector of claim 16, wherein each of said elements comprises an elongate connecting portion between said terminals, said connecting portion arranged substantially at right angles to said terminals, wherein a substantially flat end of said connecting portion of a first of said Tip elements facing a second of said Tip elements and a substantially flat end of said connecting portion of a said second Tip element facing said first Tip element are arranged opposite one another and in parallel and wherein a substantially flat end of said connecting portion of a first of said Ring elements facing a second of said Ring elements and a substantially flat end of said connecting portion of a said second Ring element facing said first Ring element are arranged opposite one another and in parallel.