Semiconductor device and fabrication method thereof
First Claim
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1. A semiconductor device comprising:
- a pixel TFT provided over a substrate and comprising a channel formation region, an n type impurity region having a first concentration, disposed in contact with the channel formation region and forming an LDD region, and an n type impurity region for forming a source region or a drain region, having a second concentration and disposed outside the n type impurity region having the first concentration;
a p channel type TFT of a driving circuit provided over the substrate and comprising a channel formation region and a p type impurity region having a third concentration, for forming a source region or a drain region;
an n channel type TFT of the driving circuit provided over the substrate and comprising a channel formation region, an n type impurity region having the first concentration, disposed in contact with the channel formation region and forming an LDD region, and an n type impurity region for forming a source region or a drain region, having the second concentration and disposed outside the n type impurity region having the first concentration;
a protective insulation film provided over a gate electrode of the pixel TFT;
an inter-layer insulation film provided over the protective insulation film and comprising an organic resin to provide a level surface over the pixel TFT; and
a pixel electrode having a light reflecting surface and provided over the inter-layer insulation film and connected to the pixel TFT through a first hole bored in at least the protective insulation film and the inter-layer insulation film,wherein the p channel type TFT of the driving circuit has an offset region formed between the channel formation region and the p type impurity region having the third concentration, for forming the source region or the drain region, andwherein a columnar spacer is formed over a second hole bored in at least the protective insulation film and the inter-layer insulation film in the driving circuit.
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Abstract
A p channel TFT of a driving circuit has a single drain structure and its n channel TFT, an LDD structure. A pixel TFT has the LDD structure. A pixel electrode disposed in a pixel unit is connected to the pixel TFT through a hole bored in at least a protective insulation film formed of an inorganic insulating material and formed above a gate electrode of the pixel TFT, and in an inter-layer insulation film disposed on the insulation film in close contact therewith. These process steps use 6 to 8 photo-masks.
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Citations
15 Claims
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1. A semiconductor device comprising:
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a pixel TFT provided over a substrate and comprising a channel formation region, an n type impurity region having a first concentration, disposed in contact with the channel formation region and forming an LDD region, and an n type impurity region for forming a source region or a drain region, having a second concentration and disposed outside the n type impurity region having the first concentration; a p channel type TFT of a driving circuit provided over the substrate and comprising a channel formation region and a p type impurity region having a third concentration, for forming a source region or a drain region; an n channel type TFT of the driving circuit provided over the substrate and comprising a channel formation region, an n type impurity region having the first concentration, disposed in contact with the channel formation region and forming an LDD region, and an n type impurity region for forming a source region or a drain region, having the second concentration and disposed outside the n type impurity region having the first concentration; a protective insulation film provided over a gate electrode of the pixel TFT; an inter-layer insulation film provided over the protective insulation film and comprising an organic resin to provide a level surface over the pixel TFT; and a pixel electrode having a light reflecting surface and provided over the inter-layer insulation film and connected to the pixel TFT through a first hole bored in at least the protective insulation film and the inter-layer insulation film, wherein the p channel type TFT of the driving circuit has an offset region formed between the channel formation region and the p type impurity region having the third concentration, for forming the source region or the drain region, and wherein a columnar spacer is formed over a second hole bored in at least the protective insulation film and the inter-layer insulation film in the driving circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A semiconductor device having a liquid crystal sandwiched between a pair of substrates, wherein:
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one of the substrates has a pixel TFT of a pixel unit and a p channel type TFT and an n channel type TFT of a driving circuit; the p channel type TFT of the driving circuit has a channel formation region and a p type impurity region having a third concentration, for forming a source region or a drain region; each of the n channel type TFT of the driving circuit and the pixel TFT has a channel formation region, an n type impurity region having a first concentration, disposed in contact with the channel formation region and forming an LDD region, and an n type impurity region for forming a source region or a drain region, having a second concentration and disposed outside the n type impurity region having the first concentration; each of pixel electrodes disposed in the pixel unit has a light reflecting surface and is formed on an inter-layer insulation film comprising an organic insulating material and is connected to the pixel TFT through a hole bored in at least a protective insulation film comprising an inorganic insulating material and disposed above a gate electrode of the pixel TFT and the inter-layer insulation film formed on the protective insulation film; the one substrate is bonded to the other of the substrates having a transparent conductor film formed thereover through at least one columnar spacer formed to be in superposition with the hole; and the p channel type TFT of the driving circuit has an offset region formed between the channel formation region and the p type impurity region having the third concentration, for forming the source region or the drain region. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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Specification