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Ternary content addressable memory (TCAM) cells with low signal line numbers

  • US 7,570,503 B1
  • Filed: 05/22/2006
  • Issued: 08/04/2009
  • Est. Priority Date: 05/20/2005
  • Status: Expired due to Fees
First Claim
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1. A ternary content addressable memory (TCAM) cell circuit formed in a TCAM memory cell array having cells arranged in rows and columns, comprising:

  • a first storage circuit that stores a first data value and has a first data path coupled to a first storage node and a second data path coupled to a second storage node, the first data path and second data path are commonly coupled to a first word line;

    a second storage circuit that stores a second data value and has a third data path coupled to a third storage node and a fourth data path coupled to a fourth storage node, the third data path and fourth data path are commonly coupled to a second word line;

    a compare circuit that generates a match result at a match node based on the first data value, second data value, and a compare data value; and

    no more than five conductive lines disposed in the column wise direction having a direct electrical connection to the TCAM cell for providing non-power supply signals, including a first bit line coupled to the first data path, a second bit line coupled to the third data path, and a third bit line coupled to the second and fourth data paths.

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