Method for making conductive nanoparticle charge storage element

• US 7,575,978 B2
• Filed: 08/04/2005
• Issued: 08/18/2009
• Est. Priority Date: 08/04/2005
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Marsh, Eugene P., Kraus, Brenda D
• Primary Examiner(s): Menz; Douglas M
• Assistant Examiner(s): Such; Matthew W
• Application Number:
  US11/197,184
• Publication Number:
  US 20070092989A1
• Time in Patent Office: 1,475 Days
• Field of Search: 438/240, 438/257, 438260-261, 438/264, 438287-288, 438/400, 438/591, 438593-594, 438/596, 438/964, 977773-774, 977810-811, 977/932, 977/943, 257314-317, 257/321, 257324-325
• US Class Current: 438/288
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: B82Y 30/00 Nanotechnology for materials or surface science, e.g. nanocomposites
• CPC Class Codes: H01L 21/28556 by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 29/40114 the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
• CPC Class Codes: H01L 29/42332 with the floating gate formed by two or more non connected parts, e.g. multi-particles flating gate
• CPC Class Codes: H01L 29/7881 Programmable transistors with only two possible levels of programmation H01L29/7888 takes precedence
• CPC Class Codes: Y10S 438/964 Roughened surface
• CPC Class Codes: Y10S 977/943 Information storage or retrieval using nanostructure

Abstract

Isolated conductive nanoparticles on a dielectric layer and methods of fabricating such isolated conductive nanoparticles provide charge storage units in electronic structures for use in a wide range of electronic devices and systems. The isolated conductive nanoparticles may be used as a floating gate in a flash memory. In an embodiment, conductive nanoparticles are deposited on a dielectric layer by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles to configure the conductive nanoparticles as charge storage elements.

Claims

1. A method of forming an electronic device, the method comprising:

forming a dielectric layer in an integrated circuit on a substrate;

forming, after forming the dielectric layer, conductive nanoparticles on the formed dielectric layer, the conductive nanoparticles formed by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles, the conductive nanoparticles including one or more of conductive metals, metal-containing compounds, or combinations of metal and metal-containing compound;

applying a plasma to the conductive nanoparticles such that the conductive nanoparticles are roughened by the plasma;

forming, after forming the conductive nanoparticles, a capping dielectric layer on and contacting the formed conductive nanoparticles and contacting the dielectric layer, the capping dielectric layer providing isolation from conductive elements, wherein forming the conductive nanoparticles is performed separate from forming the dielectric layer and from forming the capping dielectric layer; and

configuring the conductive nanoparticles as charge storage elements.

2. The method of claim 1, wherein the forming conductive nanoparticles includes forming the conductive nanoparticles such that spacing between the conductive nanoparticles is at about an effective diameter of a conductive nanoparticle.

3. The method of claim 1, wherein the forming conductive nanoparticles includes forming metal nanoparticles.

4. The method of claim 1, wherein the forming conductive nanoparticles includes forming conductive metal oxide nanoparticles.

5. The method of claim 1, wherein the forming conductive nanoparticles includes forming platinum nanoparticles.

6. The method of claim 1, wherein the forming conductive nanoparticles includes forming ruthenium nanoparticles.

7. The method of claim 1, wherein the forming conductive nanoparticles includes forming cobalt nanoparticles.

8. The method of claim 1, wherein the forming conductive nanoparticles includes forming conductive ruthenium oxide nanoparticles.

9. The method of claim 1, wherein the forming conductive nanoparticles on the dielectric layer by a plasma-assisted deposition process includes forming conductive nanoparticles on the dielectric layer by plasma-enhanced chemical vapor deposition.

10. The method of claim 1, wherein the forming conductive nanoparticles on the dielectric layer by a plasma-assisted deposition process includes forming conductive nanoparticles on the dielectric layer by physical vapor deposition.

11. The method of claim 1, wherein the forming conductive nanoparticles on the dielectric layer includes configuring the conductive nanoparticles such that a plurality of the conductive nanoparticles are disposed on a first plane and another plurality of the conductive nanoparticles are disposed on a second plane, the second plane intersecting the first plane.

12. The method of claim 1, wherein the forming conductive nanoparticles on the dielectric layer includes forming the conductive nanoparticles on a protrusion extending from the dielectric layer, the protrusion having vertical sides extending from a surface of the dielectric layer to a top of the protrusion, with at least one of the conductive nanoparticles formed on and contacting the top of the protrusion and at least one of the conductive nanoparticles formed on and contacting each of the vertical sides of the protrusion.

13. The method of claim 1, wherein the method includes forming the capping dielectric layer over the conductive nanoparticles by atomic layer deposition.

14. The method of claim 1, wherein the method includes forming the capping dielectric layer over the conductive nanoparticles at a temperature below 600°

C.

15. The method of claim 1, wherein the method includes forming a transistor having the conductive nanoparticles as a gate.

16. The method of claim 15, wherein the method includes forming the conductive nanoparticles as a floating gate.

17. The method of claim 1, wherein the method includes forming the conductive nanoparticles as a charge storage layer in a memory device.

18. The method of claim 1, wherein the method includes forming connections to couple the integrated circuit to components of an electronic system.

19. The method of claim 1, wherein the method includes annealing the conductive nanoparticles at a temperature and for a period of time such that isolated enlarged islands of agglomerated conductive nanoparticles are formed.

20. The method of claim 1, wherein the forming, after forming the dielectric layer, conductive nanoparticles includes forming conductive nanoparticles containing iridium.

21. The method of claim 1, wherein the method includes annealing, after forming the conductive nanoparticles and before forming the capping dielectric layer, at a temperature and for a period of time such that the size of the conductive nanoparticles is enlarged along with the isolation of each conductive nanoparticle from the other conductive nanoparticles.

22. The method of claim 1, wherein the forming conductive nanoparticles includes forming rhodium conductive nanoparticles.

23. The method of claim 22, wherein the forming a dielectric layer includes forming a hafnium oxide layer.

24. The method of claim 22, wherein the forming a dielectric layer includes forming a high-K dielectric layer.

25. A method of forming an electronic device, the method comprising:

forming a dielectric layer in an integrated circuit on a substrate;

depositing, after forming the dielectric layer, conductive nanoparticles on the formed dielectric layer by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles to configure the conductive nanoparticles as charge storage elements; and

forming, after depositing the conductive nanoparticles, a capping dielectric layer on and contacting the deposited conductive nanoparticles and contacting the dielectric layer, the capping dielectric layer to provide isolation from conductive elements, wherein depositing the conductive nanoparticles is performed separate from forming the dielectric layer and from forming the capping dielectric layer, wherein the depositing conductive nanoparticles on the dielectric layer by a plasma-assisted deposition process includes depositing conductive nanoparticles on the dielectric layer by plasma agglomerated atomic layer deposition.

26. The method of claim 25, wherein the forming, after forming the dielectric layer, conductive nanoparticles includes forming conductive nanoparticles containing iridium.

27. The method of claim 26, wherein the forming a dielectric layer in an integrated circuit on a substrate includes forming silicon oxide on a silicon based substrate.

28. The method of claim 25, wherein the forming conductive nanoparticles includes forming rhodium conductive nanoparticles.

29. The method of claim 28, wherein the forming a dielectric layer includes forming a hafnium oxide layer.

30. The method of claim 28, wherein the forming a dielectric layer includes forming an insulative oxynitride layer.

31. A method of forming an electronic device, the method comprising:

forming a dielectric layer in an integrated circuit on a substrate, the dielectric layer including a high-K dielectric material;

forming, after forming the dielectric layer, conductive nanoparticles on the formed dielectric layer, the conductive nanoparticles formed by atomic layer deposition such that each conductive nanoparticle is isolated from the other conductive nanoparticles, the conductive nanoparticles configured as charge storage elements;

roughening the formed conductive nanoparticles, after forming the conductive nanoparticles on the formed dielectric layer, by applying a plasma to the formed conductive nanoparticles; and

forming a capping dielectric layer on and contacting the formed conductive nanoparticles and contacting the dielectric layer, the capping dielectric layer providing isolation from conductive elements, wherein forming the conductive nanoparticles is performed separate from forming the dielectric layer and from forming the capping dielectric layer.

32. The method of claim 31, wherein the forming conductive nanoparticles by atomic layer deposition includes forming platinum nanoparticles by atomic layer deposition.

33. The method of claim 32, wherein the method includes forming a transistor having the platinum nanoparticles as a gate.

34. The method of claim 33, wherein the method includes forming the platinum nanoparticles as a floating gate.

35. The method of claim 33, wherein the method includes forming the platinum nanoparticles as a charge storage layer in a memory device.

36. The method of claim 32, wherein the method includes forming connections to couple the integrated circuit to components of an electronic system.

37. The method of claim 31, wherein the forming, after forming the dielectric layer, conductive nanoparticles includes forming conductive nanoparticles containing iridium.

38. The method of claim 31, wherein the forming conductive nanoparticles includes forming rhodium conductive nanoparticles.

39. The method of claim 38, wherein the forming a dielectric layer includes forming a hafnium oxide layer.

40. The method of claim 38, wherein the forming a dielectric layer includes forming a dielectric nanolaminate.

41. A method of forming an electronic device, the method comprising:

forming a dielectric layer in an integrated circuit on a substrate;

forming, after forming the dielectric layer, platinum nanoparticles on the formed dielectric layer, the platinum nanoparticles formed by a plasma-enhanced chemical vapor deposition process such that each platinum nanoparticle is isolated from the other platinum nanoparticles, the platinum nanoparticles configured as charge storage elements;

applying a plasma to the platinum nanoparticles such that the platinum nanoparticles are roughened by the plasma; and

forming, after forming the platinum nanoparticles, a capping dielectric layer on and contacting the formed platinum nanoparticles and contacting the dielectric layer, the capping dielectric layer providing isolation from conductive elements, wherein forming the platinum nanoparticles is performed separate from forming the dielectric layer and from forming the capping dielectric layer.

42. The method of claim 41, wherein the forming platinum nanoparticles on the dielectric layer by a plasma-enhanced chemical vapor deposition process includes using an argon plasma.

43. The method of claim 41, wherein the forming platinum nanoparticles includes depositing the platinum nanoparticles having a density of about 100 to 110 nanoparticles per 50 nm×

50 nm area.

44. The method of claim 41, wherein the method includes, after forming the platinum nanoparticles, each having a size, selectively annealing the platinum nanoparticles at a temperature and for a period of time such that the sizes of the platinum nanoparticles are enlarged.

45. The method of claim 44, wherein the selectively annealing the platinum nanoparticles includes annealing the platinum in an environment and at a temperature agglomerating the platinum nanoparticles forming larger particles with increased spacing between the larger particles.

46. A method of forming an electronic device, the method comprising:

forming a dielectric layer in an integrated circuit on a substrate;

depositing, after forming the dielectric layer, platinum nanoparticles on the formed dielectric layer by a plasma-enhanced chemical vapor deposition process such that each platinum nanoparticle is isolated from the other platinum nanoparticles, the platinum nanoparticles configured as charge storage elements; and

forming, after depositing the platinum nanoparticles, a capping dielectric layer on and contacting the deposited platinum nanoparticles and contacting the dielectric layer, the capping dielectric layer to provide isolation from conductive elements, wherein depositing the platinum nanoparticles is performed separate from forming the dielectric layer and from forming the capping dielectric layer, wherein the depositing platinum nanoparticles on the dielectric layer by a plasma-enhanced chemical vapor deposition process includes using (CH₃)₃(CH₃C₅H₄)Pt and O₂ as precursors.

47. A method of forming an electronic device, the method comprising:

forming a dielectric layer in an integrated circuit on a substrate;

depositing, after forming the dielectric layer, platinum nanoparticles on the formed dielectric layer by a plasma-enhanced chemical vapor deposition process such that each platinum nanoparticle is isolated from the other platinum nanoparticles, the platinum nanoparticles configured as charge storage elements; and

forming, after depositing the platinum nanoparticles, a capping dielectric layer on and contacting the deposited platinum nanoparticles and contacting the dielectric layer, the capping dielectric layer to provide isolation from conductive elements, wherein depositing the platinum nanoparticles is performed separate from forming the dielectric layer and from forming the capping dielectric layer, wherein the depositing platinum nanoparticles on the dielectric layer by a plasma-enhanced chemical vapor deposition process includes using a (CH₃)₃(CH₃C₅H₄)Pt precursor and one or more precursors of N₂O, O₃, or NO.

48. A method of forming an electronic device, the method comprising:

forming a dielectric layer in an integrated circuit on a substrate;

depositing, after forming the dielectric layer, platinum nanoparticles on the formed dielectric layer by a plasma-enhanced chemical vapor deposition process such that each platinum nanoparticle is isolated from the other platinum nanoparticles, the platinum nanoparticles configured as charge storage elements;

forming, after depositing the platinum nanoparticles, a capping dielectric layer on and contacting the deposited platinum nanoparticles and contacting the dielectric layer, the capping dielectric layer to provide isolation from conductive elements, wherein depositing the platinum nanoparticles is performed separate from forming the dielectric layer and from forming the capping dielectric layer; and

controlling platinum nanoparticle size by selectively annealing the platinum nanoparticles, wherein the selectively annealing the platinum nanoparticles includes annealing the platinum nanoparticles in a N₂O environment at temperatures up to 650°

C.

49. A method of forming an electronic device, the method comprising:

forming a dielectric layer in an integrated circuit on a substrate;

depositing, after forming the dielectric layer, platinum nanoparticles on the formed dielectric layer by a plasma-enhanced chemical vapor deposition process such that each platinum nanoparticle is isolated from the other platinum nanoparticles, the platinum nanoparticles configured as charge storage elements; and

forming, after depositing the platinum nanoparticles, a capping dielectric layer on and contacting the deposited platinum nanoparticles and contacting the dielectric layer, the capping dielectric layer to provide isolation from conductive elements, wherein depositing the platinum nanoparticles is performed separate from forming the dielectric layer and from forming the capping dielectric layer; and

controlling platinum nanoparticle size by selectively annealing the platinum nanoparticles, wherein the selectively annealing the platinum nanoparticles includes annealing the platinum nanoparticles in a NH₃ environment at temperatures up to 850°

C.

50. A method of forming an electronic device, the method comprising:

forming a dielectric layer in an integrated circuit on a substrate;

forming, after forming the dielectric layer, ruthenium nanoparticles on the formed dielectric layer, the ruthenium nanoparticles formed by a plasma-enhanced chemical vapor deposition process such that each ruthenium nanoparticle is isolated from the other ruthenium nanoparticles, the ruthenium nanoparticles configured as charge storage elements;

applying a plasma to the ruthenium nanoparticles such that the ruthenium nanoparticles are roughened by the plasma; and

forming, after forming the ruthenium nanoparticles, a capping dielectric layer on and contacting the formed ruthenium nanoparticles and contacting the dielectric layer, the capping dielectric layer providing isolation from conductive elements, wherein forming the ruthenium nanoparticles is performed separate from forming the dielectric layer and from forming the capping dielectric layer.

51. The method of claim 50, wherein the forming ruthenium nanoparticles on the dielectric layer by a plasma-enhanced chemical vapor deposition process includes using an argon plasma.

52. The method of claim 50, wherein the forming ruthenium nanoparticles includes forming the ruthenium nanoparticles having a density of about 100 to 110 nanoparticles per 50 nm×

50 nm area.

53. The method of claim 50, wherein the method includes, after forming the ruthenium nanoparticles, each having a size, selectively annealing the ruthenium nanoparticles at a temperature and for a period of time such that the sizes of the ruthenium nanoparticles are enlarged.

54. The method of claim 53, wherein the selectively annealing the ruthenium nanoparticles includes annealing the ruthenium in an environment and at a temperature agglomerating the ruthenium nanoparticles forming larger particles with increased spacing between the larger particles.

55. A method of forming an electronic device, the method comprising:

forming a dielectric layer in an integrated circuit on a substrate;

depositing, after forming the dielectric layer, ruthenium nanoparticles on the formed dielectric layer by a plasma-enhanced chemical vapor deposition process such that each ruthenium nanoparticle is isolated from the other ruthenium nanoparticles, the ruthenium nanoparticles configured as charge storage elements; and

forming, after depositing the ruthenium nanoparticles, a capping dielectric layer on and contacting the deposited ruthenium nanoparticles and contacting the dielectric layer, the capping dielectric layer to provide isolation from conductive elements, wherein depositing the ruthenium nanoparticles is performed separate from forming the dielectric layer and from forming the capping dielectric layer, wherein the depositing ruthenium nanoparticles on the dielectric layer by a plasma-enhanced chemical vapor deposition process includes using a (C₆H₈)Ru(CO)₃ precursor.

56. A method of forming an electronic device, the method comprising:

forming a dielectric layer in an integrated circuit on a substrate; and

depositing, after forming the dielectric layer, cobalt nanoparticles on the formed dielectric layer by a plasma agglomerated atomic layer deposition process such that each cobalt nanoparticle is isolated from the other cobalt nanoparticles, the cobalt nanoparticles configured as charge storage elements; and

forming, after depositing the cobalt nanoparticles, a capping dielectric layer on and contacting the deposited cobalt nanoparticles and contacting the dielectric layer, the capping dielectric layer to provide isolation from conductive elements, wherein depositing the cobalt nanoparticles is performed separate from forming the dielectric layer and from forming the capping dielectric layer.

57. The method of claim 56, wherein the depositing cobalt nanoparticles on the dielectric layer by an atomic layer deposition process includes using a C₅H₅Co(CO)₂ precursor and one or more of a NH₃ precursor or a H₂ precursor.

58. The method of claim 56, wherein the depositing cobalt nanoparticles on the dielectric layer by an atomic layer deposition includes using an argon plasma at the completion of a number of ALD cycles.

59. The method of claim 58, wherein the using an argon plasma at the completion of a number of ALD cycles includes using an argon plasma at the completion of ten ALD cycles.

60. The method of claim 56, wherein the depositing cobalt nanoparticles includes depositing the cobalt nanoparticles having a density of about 100 to 110 nanoparticles per 50 nm×

50 nm area.

61. A method of forming a memory, the method comprising:

forming an array of memory cells, each memory cell having a charge storage unit structured by;

forming a dielectric layer on a substrate;

forming, after forming the dielectric layer, conductive nanoparticles on the formed dielectric layer, the conductive nanoparticles formed by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles, the conductive nanoparticles configured as charge storage elements, the conductive nanoparticles including one or more of conductive metals, metal-containing compounds, or combinations of metal and metal-containing compound;

applying a plasma to the conductive nanoparticles such that the conductive nanoparticles are roughened by the plasma; and

forming, after forming the conductive nanoparticles, a capping dielectric layer on and contacting the formed conductive nanoparticles and contacting the dielectric layer, the capping dielectric layer to provide isolation from conductive elements, wherein forming the conductive nanoparticles is performed separate from forming the dielectric layer and from forming the capping dielectric layer.

62. The method of claim 61, wherein the forming, after forming the dielectric layer, conductive nanoparticles includes forming conductive nanoparticles containing iridium.

63. The method of claim 61, wherein the forming conductive nanoparticles includes forming the conductive nanoparticles such that spacing between the conductive nanoparticles is at about an effective diameter of a conductive nanoparticle.

64. The method of claim 61, wherein the forming conductive nanoparticles includes forming metal nanoparticles.

65. The method of claim 61, wherein the forming conductive nanoparticles includes forming conductive metal oxide nanoparticles.

66. The method of claim 61, wherein the forming conductive nanoparticles includes forming platinum nanoparticles.

67. The method of claim 61, wherein the forming conductive nanoparticles includes forming ruthenium nanoparticles.

68. The method of claim 61, wherein the forming conductive nanoparticles includes forming cobalt nanoparticles.

69. The method of claim 61, wherein the forming conductive nanoparticles includes forming conductive ruthenium oxide nanoparticles.

70. The method of claim 61, wherein the method includes forming the capping dielectric layer over the conductive nanoparticles by atomic layer deposition.

71. The method of claim 61, wherein the method includes forming the capping dielectric layer over the conductive nanoparticles at a temperature below 600°

C.

72. The method of claim 61, wherein the method includes forming a transistor having the conductive nanoparticles as a floating gate.

73. A method of forming an electronic system, the method comprising:

providing a controller; and

coupling an electronic apparatus to the controller, wherein one or both of the controller or the electronic apparatus are formed by a method including;

forming a dielectric layer on a substrate;

forming, after forming the dielectric layer, conductive nanoparticles on the formed dielectric layer, the conductive nanoparticles formed by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles, the conductive nanoparticles including one or more of conductive metals, metal-containing compounds, or combinations of metal and metal-containing compound, the conductive nanoparticles configured as charge storage elements;

applying a plasma to the conductive nanoparticles such that the conductive nanoparticles are roughened by the plasma; and

forming, after forming the conductive nanoparticles, a capping dielectric layer on and contacting the formed conductive nanoparticles and contacting the dielectric layer, the capping dielectric layer providing isolation from conductive elements, wherein forming the conductive nanoparticles is performed separate from forming the dielectric layer and from forming the capping dielectric layer.

74. The method of claim 73, wherein the forming conductive nanoparticles includes forming the conductive nanoparticles such that spacing between the conductive nanoparticles is at about an effective diameter of a conductive nanoparticle.

75. The method of claim 73, wherein the forming conductive nanoparticles includes forming metal nanoparticles.

76. The method of claim 73, wherein the forming conductive nanoparticles includes forming conductive metal oxide nanoparticles.

77. The method of claim 73, wherein the forming conductive nanoparticles includes forming nanoparticles of a multiple element conductive compound.

78. The method of claim 73, wherein the method includes forming a transistor having the conductive nanoparticles as a floating gate.