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Circuit protection device with automatic monitoring of operation fault

  • US 7,576,960 B2
  • Filed: 08/08/2007
  • Issued: 08/18/2009
  • Est. Priority Date: 04/03/2006
  • Status: Active Grant
First Claim
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1. A circuit protection device comprisinga ground fault circuit interrupter protection device (1),a ground fault test circuit module (3),a drive module (4) having a solenoid K1B, an SCR Q1, and a triode Q3, anda circuit module (2) having a master control system (2-1) that periodically sends out an impulse that simulates an electric shock signal, a monitoring system (2-2) that has an interlocking amplifier and comparator, and a signaling system (2-3) that indicates normal or faulty operation of the device,wherein an input of the circuit module (2) is connected to an output of the ground fault circuit interrupter protecting device (1);

  • an output of the circuit module (2) is connected to an input of the ground fault circuit interrupter protecting device (1);

    an input of the circuit module (2) is connected to an output of the drive module (4),wherein the master control system (2-1) is connected to a power input line N;

    the monitoring system (2-2) is connected to an anode of the SCR Q1 and a base of the triode Q3;

    the signaling system (2-3) is connected to two input pins of the solenoid K1B, andwherein the master control system (2-1) comprises a resistor R20, a resistor R23, and a capacitor C13, each having one end connected together;

    another end of the resistor R20, and a first end of a triode Q5, a resistor R15, and a resistor R12, all being connected to a VCC;

    a resistor R23 having one end connected to a second end of the triode Q5;

    a resistor R18 having one end connected to a third end of the triode Q5;

    another end of the capacitor C13 and one end of a capacitor C11, both being connected to a power input;

    another end of the resistor R18, capacitor C11, and one end of a resistor R16, all being connected to pin 1 and pin 2 of an integrated block U2A;

    another end of the resistor R16 and one end of a capacitor C12, both being connected to pin 3 of the integrated block U2A;

    another end of the resistor R15 and another end of the capacitor C12, both being connected to pin 5 and pin 6 of an integrated block U2B;

    a resistor R19, a resistor R5, a diode D9, and a resistor R14, all having one end connected to pin 4 of the integrated block U2B;

    another end of resistor R19 and a first end of a triode Q4 being connected;

    a second end of the triode Q4 and another end of the resistor R12 being connected;

    a third end of the triode Q4 being connected to the power input line N which has passed through a signal transformer L1 and a neutral transformer L2.

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