Controlling a searchable range within a network search engine
First Claim
Patent Images
1. A content addressable memory (CAM) device comprising:
- a CAM array to store data values in entries having respective addresses and to compare the data values with a search key;
an interface to receive a first address and a second address that define a range of the addresses;
range-control circuitry to generate a hit signal having either a first state or a second state according to whether any of the entries having addresses within the range of addresses match the search key;
wherein the range-control circuitry includes;
a decoder circuit to receive the first address and a plurality of match signals, and to output a plurality of enable signals each having either a first state or a second state according to the state of each corresponding match signal and whether their respective addresses are greater than or equal to the first address; and
an encoder circuit to receive the plurality of enable signals and to output a match address and an intermediate result signal.
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Abstract
Controlling a searchable range within a network search engine. A CAM array is provided within the network search engine to store data values in entries having respective addresses and to compare the data values with a search key. First address and a second addresses that define a range of the addresses are received at an interface of the network search engine, and range-control circuitry is provided within the network search engine to generate a hit signal having either a first state or a second state according to whether any of the entries having addresses within the range of addresses match the search key.
50 Citations
10 Claims
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1. A content addressable memory (CAM) device comprising:
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a CAM array to store data values in entries having respective addresses and to compare the data values with a search key; an interface to receive a first address and a second address that define a range of the addresses; range-control circuitry to generate a hit signal having either a first state or a second state according to whether any of the entries having addresses within the range of addresses match the search key; wherein the range-control circuitry includes; a decoder circuit to receive the first address and a plurality of match signals, and to output a plurality of enable signals each having either a first state or a second state according to the state of each corresponding match signal and whether their respective addresses are greater than or equal to the first address; and an encoder circuit to receive the plurality of enable signals and to output a match address and an intermediate result signal. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A content addressable memory (CAM) device comprising:
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a CAM array to store data values in entries having respective addresses and to compare the data values with a search key; an interface to receive a first address and a second address that define a range of the addresses; range-control circuitry to generate a hit signal having either a first state or a second state according to whether any of the entries having addresses within the range of address match the search key; wherein the range-control circuitry includes; a decoder circuit to receive the first address, the second address, and the plurality of match signals, and to output a plurality of enable signals each having either a first state or a second state according to the state of each of corresponding match signal and whether the numerical values of their respective addresses are greater than or equal to that of the first address and less than or equal to that of the second address; and an encoder circuit to receive the plurality of enable signals and to output a match address and the hit signal.
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9. Computer-readable media having information embodied therein that includes a description of an integrated circuit device, the information including descriptions of:
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a CAM array to store data values in entries having respective addresses and to compare the data values with a search key; an interface to receive a first address and a second address that define a range of the addresses; range-control circuitry to generate a hit signal having either a first state or a second state according to whether any of the entries having addresses within the range of addresses match the search key; and wherein the range-control circuitry includes; a decoder circuit to receive the first address and the plurality of match signals, and to output a plurality of enable signals each having either a first state or a second state according to the state of each corresponding match signal and whether their respective addresses are greater than or equal to the first address; and an encoder circuit to receive the plurality of enable signals and to output a match address and an intermediate result signal.
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10. Computer-readable media having information embodied therein that includes a description of an integrated circuit device, the information including descriptions of:
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a CAM array to store data values in entries having respective addresses and to compare the data values with a search key; an interface to receive a first address and a second address that define a range of the addresses; range-control circuitry to generate a hit signal having either a first state or a second state according to whether any of the entries having addresses within the range of addresses match the search key; wherein the range-control circuitry includes; a decoder circuit to receive the first address, the second address, and the plurality of match signals, and to output a plurality of enable signals each having either a first state or a second state according to the state of each of corresponding match signal and whether the numerical values of their respective addresses are greater than or equal to that of the first address and less than or equal to that of the second address; and an encoder circuit to receive the plurality of enable signals and to output a match address and the hit signal.
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Specification