Controlled fabrication of gaps in electrically conducting structures

• US 7,582,490 B2
• Filed: 01/29/2004
• Issued: 09/01/2009
• Est. Priority Date: 06/22/1999
• Status: Expired due to Term

• Current Assignee: President and Fellows of Harvard College (Harvard Corporation)
• Original Assignee: President and Fellows of Harvard College (Harvard Corporation)
• Inventors: King, Gavin M., Schurmann, Gregor M., Branton, Daniel, Golovchenko, Jene A.
• Primary Examiner(s): Warden; Jill
• Assistant Examiner(s): TURK, NEIL N
• Application Number:
  US10/767,102
• Publication Number:
  US 20040229386A1
• Time in Patent Office: 2,042 Days
• Field of Search: 422/50, 422/68.1, 422/82.01, 436/43, 436/149, 438/48, 438/49, 257/1, 257/9, 257/25, 257/30, 257/104, 257/106, 257/321, 204/192.3, 204/192.13
• US Class Current: 438/10
• CPC Class Codes: G01N 33/48721 Investigating individual macromolecules, e.g. by translocation through nanopores Coulter counters in general G01N15/12; fabrication methods for nanoscale apertures B81B1/00; sequencing of nucleic acids C12Q1/68
• CPC Class Codes: Y10T 436/11 Automated chemical analysis
• CPC Class Codes: Y10T 436/12 Condition responsive control

Abstract

A method for controlling a gap in an electrically conducting solid state structure provided with a gap. The structure is exposed to a fabrication process environment conditions of which are selected to alter an extent of the gap. During exposure of the structure to the process environment, a voltage bias is applied across the gap. Electron tunneling current across the gap is measured during the process environment exposure and the process environment is controlled during process environment exposure based on tunneling current measurement. A method for controlling the gap between electrically conducting electrodes provided on a support structure. Each electrode has an electrode tip separated from other electrode tips by a gap. The electrodes are exposed to a flux of ions causing transport of material of the electrodes to corresponding electrode tips, locally adding material of the electrodes to electrode tips in the gap.

Claims

1. A method for controlling a gap between electrically conducting features on a membrane, comprising the steps of:

providing a plurality of electrically conducting features disposed on a membrane including an aperture aligned with a gap between the features;

exposing the features to a fabrication process environment conditions of which are selected to alter an extent of the gap;

applying a voltage bias across the gap during process environment exposure of the features;

measuring electron tunneling current across the gap during process environment exposure of the features to indicate an extent of the gap; and

controlling the process environment during process environment exposure of the features, based on the tunneling current measurement, to control an extent of the gap.

2. The method of claim 1 wherein controlling the process environment comprises comparing tunneling current measurement with a threshold tunneling current corresponding to a prespecified gap extent and controlling the process environment based on the comparison.

3. The method of claim 1 wherein the conditions of the fabrication process environment are selected to increase an extent of the gap.

4. The method of claim 1 wherein the conditions of the fabrication process environment are selected to decrease an extent of the gap.

5. The method of claim 1 wherein the fabrication process environment comprises ion beam exposure of the features.

6. The method of claim 5 wherein the ion beam exposure comprises blanket ion beam exposure of the features.

7. The method of claim 5 wherein the ion beam exposure comprises rastering of the features by a focused ion beam.

8. The method of claim 1 wherein the plurality of electrically conducting features on the membrane comprises two electrically conducting electrodes having the gap between the electrodes.

9. The method of claim 8 wherein the membrane comprises an electrically insulating membrane including an aperture aligned with the gap between the electrodes.

10. The method of claim 1 wherein the fabrication process environment comprises electron beam exposure of the features.

11. The method of claim 8 wherein each electrically conducting electrode is connected in a closed-loop circuit across the gap for measuring electron tunneling across the gap.

12. The method of claim 8 wherein each electrically conducting electrode is disposed in a connection to an electrical contact pad.

13. The method of claim 12 wherein applying a voltage bias across the gap between the electrodes comprises applying a voltage bias between the electrical contact pads.

14. The method of claim 1 wherein providing a plurality of electrically conducting features disposed on a membrane including an aperture aligned with a gap between the features comprises:

first providing an electrically conducting feature, disposed on a membrane including an aperture, without a gap; and

initiating the fabrication process environment to define the plurality of electrically conducting features by forming a gap between the features in alignment with the aperture.

15. The method of claim 1 wherein providing a plurality of electrically conducting features disposed on a membrane including an aperture aligned with a gap between the features comprises:

first providing an electrically conducting feature, disposed on a membrane including an aperture, without a gap; and

initiating a fabrication process environment to provide a gap in the electrically conducting feature, in alignment with the aperture, that defines two electrically conducting electrodes separated from each other by the gap.

16. The method of claim 15 wherein the exposure of the two electrically conducting electrodes to fabrication process environment increases the extent of the gap between the two electrically conducting electrodes.

17. The method of claim 9 wherein the electrically insulating membrane comprises a silicon nitride membrane.

18. The method of claim 1 wherein the membrane is supported at its edges by a silicon substrate.

19. The method of claim 1 wherein measuring electron tunneling current comprises amplifying acquired electron tunneling current prior to measuring electron tunneling current.

20. The method of claim 1 wherein measuring electron tunneling current comprises digitizing acquired electron tunneling current prior to measuring electron tunneling current.

21. The method of claim 1 wherein applying a voltage bias across the gap comprises applying across the gap a voltage that is less than a work function that is characteristic of the electrically conducting features.

22. The method of claim 1 wherein controlling the process environment based on tunneling current measurement comprises:

determining an extent of the gap, g, as a function of measured tunneling current, I, and applied voltage bias, V as;

I(V) =aV²e<sup>−

b/v</sup>

where

23. The method of claim 1 wherein controlling the process environment based on tunneling current measurement comprises:

determining an extent of the gap, g, as a function of measured tunneling current, I, and applied voltage bias, V, as;

I(V)=I₀e<sup>−

α

√

{square root over (Φ

g)}</sup>

where