Method of forming a trench structure having one or more diodes embedded therein adjacent a PN junction
First Claim
Patent Images
1. A method of forming a semiconductor structure, comprising:
- forming a semiconductor region comprising a P-type region and a N-type region forming a PN junction therebetween;
forming a first trench extending in the semiconductor region adjacent at least one of the P-type and N-type regions;
forming an insulating layer in the first trench; and
forming at least one diode in the first trench, the at least one diode being at least partially insulated from at least one of the P-type and N-type regions by the insulating layer, wherein no current flows through the first trench when the semiconductor structure is biased in a conducting state, and wherein the at least one diode influences an electric field in at least one of the P-type and N-type regions to thereby increase the blocking voltage of the semiconductor structure.
6 Assignments
0 Petitions
Accused Products
Abstract
A semiconductor structure is formed as follows. A semiconductor region is formed to have a P-type region and a N-type region forming a PN junction therebetween. A first trench is formed extending in the semiconductor region adjacent at least one of the P-type and N-type regions is formed. At least one diode is formed in the trench.
401 Citations
27 Claims
-
1. A method of forming a semiconductor structure, comprising:
-
forming a semiconductor region comprising a P-type region and a N-type region forming a PN junction therebetween; forming a first trench extending in the semiconductor region adjacent at least one of the P-type and N-type regions; forming an insulating layer in the first trench; and forming at least one diode in the first trench, the at least one diode being at least partially insulated from at least one of the P-type and N-type regions by the insulating layer, wherein no current flows through the first trench when the semiconductor structure is biased in a conducting state, and wherein the at least one diode influences an electric field in at least one of the P-type and N-type regions to thereby increase the blocking voltage of the semiconductor structure. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 26)
-
-
21. A method of forming a semiconductor structure, comprising:
-
forming an epitaxial layer over and in contact with a substrate, the epitaxial layer being of the same conductivity type as the substrate; forming a body region in the epitaxial layer so that after forming the body region the epitaxial layer comprises a P-type region and an N-type region forming a PN junction therebetween, the body region being one of the P-type and N-type regions, and a drift region being the other one of the P-type and N-type regions, the drift region being of the same conductivity type as the substrate; forming a plurality of laterally spaced trenches each extending through at least a portion of the drift region; forming an insulating layer lining sidewalls of each trench; and forming a plurality of diodes in each of the plurality of trenches, the plurality of diodes being at least partially insulated from the drift region by the insulating layer, wherein no current flows through the plurality of trenches when the semiconductor structure is biased in a conducting state, and wherein the plurality of diodes influence an electric field in at least one of the P-type and N-type regions to thereby increase the blocking voltage of the semiconductor structure. - View Dependent Claims (22, 23, 24, 25, 27)
-
Specification