Silicon carbide semiconductor device and method for manufacturing the same

• US 7,582,932 B2
• Filed: 11/08/2005
• Issued: 09/01/2009
• Est. Priority Date: 11/08/2004
• Status: Active Grant

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Takeuchi, Yuichi, Kumar, Malhan Rajesh
• Primary Examiner(s): Parker; Kenenth A
• Assistant Examiner(s): Kim; Jay C
• Application Number:
  US11/268,771
• Publication Number:
  US 20060097268A1
• Time in Patent Office: 1,393 Days
• Field of Search: 257/77, 257/E29.257, 257/E29.26, 257/E29.262, 257/330, 257/331, 257/332
• US Class Current: 257/332
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/7391 Gated diode structures
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7828 without inversion channel, e.g. vertical ACCUFETs, normally-on vertical MISFETs
• CPC Class Codes: Y10S 438/931 Silicon carbide semiconductor

Abstract

A silicon carbide semiconductor device includes: a semiconductor substrate having a silicon carbide substrate, a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer; a trench penetrating the second and the third semiconductor layers to reach the first semiconductor layer; a channel layer on a sidewall and a bottom of the trench; an oxide film on the channel layer; a gate electrode on the oxide film; a first electrode connecting to the third semiconductor layer; and a second electrode connecting to the silicon carbide substrate. A position of a boundary between the first semiconductor layer and the second semiconductor layer is disposed lower than an utmost lowest position of the oxide film.

Claims

1. A silicon carbide semiconductor device comprising:

a semiconductor substrate including a silicon carbide substrate having a first conductive type or a second conductive type, a first semiconductor layer made of the first conductive type silicon carbide and having an impurity concentration lower than an impurity concentration of the silicon carbide substrate, a second semiconductor layer made of the second conductive type silicon carbide, and a third semiconductor layer made of the first conductive type silicon carbide, which are stacked in this order;

a trench disposed in a cell region of the semiconductor substrate and penetrating the second and the third semiconductor layers to reach the first semiconductor layer;

a channel layer having the first conductive type and disposed on a sidewall and a bottom of the trench;

an oxide film disposed on the channel layer in the trench and including a part for functioning as a gate oxide film;

a gate electrode disposed on a surface of the oxide film in the trench;

a first electrode electrically connecting to the third semiconductor layer; and

a second electrode electrically connecting to the silicon carbide substrate, wherein

a position of a boundary between the first semiconductor layer and the second semiconductor layer is disposed lower than an utmost lowest position of the oxide film in the trench,

an impurity concentration of the second conductive type impurity in the second semiconductor layer is gradually reduced from a height of a position of the oxide film disposed on the bottom of the trench to the boundary between the first semiconductor layer and the second semiconductor layer, and

an impurity concentration of the first conductive type impurity in the channel layer is higher than an impurity concentration of the first conductive type impurity in the first semiconductor layer.

2. A silicon carbide semiconductor device comprising:

a semiconductor substrate including a silicon carbide substrate having a first conductive type or a second conductive type, a first semiconductor layer made of the first conductive type silicon carbide and having an impurity concentration lower than an impurity concentration of the silicon carbide substrate, a second semiconductor layer made of the second conductive type silicon carbide, and a third semiconductor layer made of the first conductive type silicon carbide, which are stacked in this order;

a trench disposed in a cell region of the semiconductor substrate and penetrating the second and the third semiconductor layers to reach the first semiconductor layer;

a channel layer having the first conductive type and disposed on a sidewall and a bottom of the trench;

an oxide film disposed on the channel layer in the trench and including a part for functioning as a gate oxide film;

a gate electrode disposed on a surface of the oxide film in the trench;

a first electrode electrically connecting to the third semiconductor layer; and

a second electrode electrically connecting to the silicon carbide substrate, wherein

a position of a boundary between the first semiconductor layer and the second semiconductor layer is disposed lower than an utmost lowest position of the oxide film in the trench,

a low resistance layer having the first conductive type and disposed under the oxide film on the bottom of the trench, and

a length from the utmost lowest position of the oxide film to the bottom of the trench corresponds to a sum of a film thickness of the low resistance layer and a film thickness of the channel layer.

3. The silicon carbide semiconductor device according to claim 2, wherein

an impurity concentration of the second conductive type impurity in the second semiconductor layer is gradually reduced from a height of a position corresponding to a bottom of the low resistance layer to the boundary between the first semiconductor layer and the second semiconductor layer, and

an impurity concentration of the first conductive type impurity in the channel layer is lower than an impurity concentration of the first conductive type impurity in the low resistance layer, and higher than an impurity concentration of the first conductive type impurity in the first semiconductor layer.

4. A silicon carbide semiconductor device comprising:

a semiconductor substrate including a silicon carbide substrate having a first conductive type or a second conductive type, a first semiconductor layer made of the first conductive type silicon carbide and having an impurity concentration lower than an impurity concentration of the silicon carbide substrate, a second semiconductor layer made of the second conductive type silicon carbide, and a third semiconductor layer made of the first conductive type silicon carbide, which are stacked in this order;

a trench disposed in a cell region of the semiconductor substrate and penetrating the second and the third semiconductor layers to reach the first semiconductor layer;

a channel layer having the first conductive type and disposed on a sidewall and a bottom of the trench;

an oxide film disposed on the channel layer in the trench and including a part for functioning as a gate oxide film;

a gate electrode disposed on a surface of the oxide film in the trench;

a first electrode electrically connecting to the third semiconductor layer; and

a second electrode electrically connecting to the silicon carbide substrate, wherein

a position of a boundary between the first semiconductor layer and the second semiconductor layer is disposed lower than an utmost lowest position of the oxide film in the trench,

a plane orientation of the sidewall of the trench is a (1-100)-surface or a (1 1-20)-surface, and

a thickness of a part of the channel layer disposed on the bottom of the trench is larger than a thickness of a part of the channel layer disposed on the sidewall of the trench.

5. The silicon carbide semiconductor device according to claim 4, wherein

the thickness of the part of the channel layer disposed on the bottom of the trench is up to five times larger than that disposed on the sidewall of the trench.

6. The silicon carbide semiconductor device according to claim 4, wherein

a dopant concentration of the first conductive type impurity in the part of the channel layer disposed on the sidewall of the trench is five times larger than a dopant concentration of the first conductive type impurity in the part of the channel layer disposed on the bottom of the trench.